From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751205AbdH3TDy (ORCPT ); Wed, 30 Aug 2017 15:03:54 -0400 Received: from mail-pg0-f48.google.com ([74.125.83.48]:35169 "EHLO mail-pg0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750762AbdH3TDw (ORCPT ); Wed, 30 Aug 2017 15:03:52 -0400 From: Kevin Hilman To: Ulf Hansson Cc: Jerome Brunet , Carlo Caione , "linux-mmc\@vger.kernel.org" , "open list\:ARM\/Amlogic Meson..." , "linux-arm-kernel\@lists.infradead.org" , "linux-kernel\@vger.kernel.org" Subject: Re: [PATCH v3 00/13] mmc: meson-gx: driver fixups and upgrades Organization: BayLibre References: <20170828142915.27020-1-jbrunet@baylibre.com> Date: Wed, 30 Aug 2017 12:03:43 -0700 In-Reply-To: (Ulf Hansson's message of "Wed, 30 Aug 2017 15:13:57 +0200") Message-ID: <7hr2vsdgj4.fsf@baylibre.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ulf, Ulf Hansson writes: > On 28 August 2017 at 16:29, Jerome Brunet wrote: >> The patchset features several bugfixes, rework and upgrade for the >> meson-gx MMC driver. >> >> The main goal is to improve readability and enable new high speed >> modes, such as eMMC DDR52 and sdcard UHS modes up to SDR50 (100Mhz) >> >> SDR104 is not working with a few cards on the p200 and the >> libretech-cc. I suspect that 200Mhz might be a bit too fast for the PCB >> of these boards, adding noise to the signal and eventually breaking >> the communication with some cards. The same cards are working well on a >> laptop or the nanopi-k2 at 200Mhz. >> >> This series has been tested on gxbb-p200, gxbb-nanopi-k2 and >> gxl-s905x-libretech-cc >> >> Changes since v2 [1]: >> * Drop patches 1 to 3: Applied. >> * Drop patch 4: Debug stuff which should not have been sent. >> * Added fix to previous patch 3: >> If the clock register is not initialized before registering the clk >> with CCF, the framework will complain about an illegal divider value. >> This had gone unnoticed because it was later fixed by the clock init >> rework. >> >> Ulf, I know it is getting late but it would be nice if patch #1 of >> this v3 could go with 3 patches you already applied. The rest can >> wait for the following cycle. > > I decided to pick them all, so applied for next! > Just to double-check, so I can plan for the DT patches accordingly... you are queuing this for v4.14, right? Kevin From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kevin Hilman Subject: Re: [PATCH v3 00/13] mmc: meson-gx: driver fixups and upgrades Date: Wed, 30 Aug 2017 12:03:43 -0700 Message-ID: <7hr2vsdgj4.fsf@baylibre.com> References: <20170828142915.27020-1-jbrunet@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: Received: from mail-pg0-f46.google.com ([74.125.83.46]:38734 "EHLO mail-pg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750758AbdH3TDw (ORCPT ); Wed, 30 Aug 2017 15:03:52 -0400 Received: by mail-pg0-f46.google.com with SMTP id b8so22354426pgn.5 for ; Wed, 30 Aug 2017 12:03:51 -0700 (PDT) In-Reply-To: (Ulf Hansson's message of "Wed, 30 Aug 2017 15:13:57 +0200") Sender: linux-mmc-owner@vger.kernel.org List-Id: linux-mmc@vger.kernel.org To: Ulf Hansson Cc: Jerome Brunet , Carlo Caione , "linux-mmc@vger.kernel.org" , "open list:ARM/Amlogic Meson..." , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Hi Ulf, Ulf Hansson writes: > On 28 August 2017 at 16:29, Jerome Brunet wrote: >> The patchset features several bugfixes, rework and upgrade for the >> meson-gx MMC driver. >> >> The main goal is to improve readability and enable new high speed >> modes, such as eMMC DDR52 and sdcard UHS modes up to SDR50 (100Mhz) >> >> SDR104 is not working with a few cards on the p200 and the >> libretech-cc. I suspect that 200Mhz might be a bit too fast for the PCB >> of these boards, adding noise to the signal and eventually breaking >> the communication with some cards. The same cards are working well on a >> laptop or the nanopi-k2 at 200Mhz. >> >> This series has been tested on gxbb-p200, gxbb-nanopi-k2 and >> gxl-s905x-libretech-cc >> >> Changes since v2 [1]: >> * Drop patches 1 to 3: Applied. >> * Drop patch 4: Debug stuff which should not have been sent. >> * Added fix to previous patch 3: >> If the clock register is not initialized before registering the clk >> with CCF, the framework will complain about an illegal divider value. >> This had gone unnoticed because it was later fixed by the clock init >> rework. >> >> Ulf, I know it is getting late but it would be nice if patch #1 of >> this v3 could go with 3 patches you already applied. The rest can >> wait for the following cycle. > > I decided to pick them all, so applied for next! > Just to double-check, so I can plan for the DT patches accordingly... you are queuing this for v4.14, right? Kevin From mboxrd@z Thu Jan 1 00:00:00 1970 From: khilman@baylibre.com (Kevin Hilman) Date: Wed, 30 Aug 2017 12:03:43 -0700 Subject: [PATCH v3 00/13] mmc: meson-gx: driver fixups and upgrades In-Reply-To: (Ulf Hansson's message of "Wed, 30 Aug 2017 15:13:57 +0200") References: <20170828142915.27020-1-jbrunet@baylibre.com> Message-ID: <7hr2vsdgj4.fsf@baylibre.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Ulf, Ulf Hansson writes: > On 28 August 2017 at 16:29, Jerome Brunet wrote: >> The patchset features several bugfixes, rework and upgrade for the >> meson-gx MMC driver. >> >> The main goal is to improve readability and enable new high speed >> modes, such as eMMC DDR52 and sdcard UHS modes up to SDR50 (100Mhz) >> >> SDR104 is not working with a few cards on the p200 and the >> libretech-cc. I suspect that 200Mhz might be a bit too fast for the PCB >> of these boards, adding noise to the signal and eventually breaking >> the communication with some cards. The same cards are working well on a >> laptop or the nanopi-k2 at 200Mhz. >> >> This series has been tested on gxbb-p200, gxbb-nanopi-k2 and >> gxl-s905x-libretech-cc >> >> Changes since v2 [1]: >> * Drop patches 1 to 3: Applied. >> * Drop patch 4: Debug stuff which should not have been sent. >> * Added fix to previous patch 3: >> If the clock register is not initialized before registering the clk >> with CCF, the framework will complain about an illegal divider value. >> This had gone unnoticed because it was later fixed by the clock init >> rework. >> >> Ulf, I know it is getting late but it would be nice if patch #1 of >> this v3 could go with 3 patches you already applied. The rest can >> wait for the following cycle. > > I decided to pick them all, so applied for next! > Just to double-check, so I can plan for the DT patches accordingly... you are queuing this for v4.14, right? Kevin From mboxrd@z Thu Jan 1 00:00:00 1970 From: khilman@baylibre.com (Kevin Hilman) Date: Wed, 30 Aug 2017 12:03:43 -0700 Subject: [PATCH v3 00/13] mmc: meson-gx: driver fixups and upgrades In-Reply-To: (Ulf Hansson's message of "Wed, 30 Aug 2017 15:13:57 +0200") References: <20170828142915.27020-1-jbrunet@baylibre.com> Message-ID: <7hr2vsdgj4.fsf@baylibre.com> To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org Hi Ulf, Ulf Hansson writes: > On 28 August 2017 at 16:29, Jerome Brunet wrote: >> The patchset features several bugfixes, rework and upgrade for the >> meson-gx MMC driver. >> >> The main goal is to improve readability and enable new high speed >> modes, such as eMMC DDR52 and sdcard UHS modes up to SDR50 (100Mhz) >> >> SDR104 is not working with a few cards on the p200 and the >> libretech-cc. I suspect that 200Mhz might be a bit too fast for the PCB >> of these boards, adding noise to the signal and eventually breaking >> the communication with some cards. The same cards are working well on a >> laptop or the nanopi-k2 at 200Mhz. >> >> This series has been tested on gxbb-p200, gxbb-nanopi-k2 and >> gxl-s905x-libretech-cc >> >> Changes since v2 [1]: >> * Drop patches 1 to 3: Applied. >> * Drop patch 4: Debug stuff which should not have been sent. >> * Added fix to previous patch 3: >> If the clock register is not initialized before registering the clk >> with CCF, the framework will complain about an illegal divider value. >> This had gone unnoticed because it was later fixed by the clock init >> rework. >> >> Ulf, I know it is getting late but it would be nice if patch #1 of >> this v3 could go with 3 patches you already applied. The rest can >> wait for the following cycle. > > I decided to pick them all, so applied for next! > Just to double-check, so I can plan for the DT patches accordingly... you are queuing this for v4.14, right? Kevin