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From: "Cédric Le Goater" <clg@kaod.org>
To: Peter Delevoryas <pdel@fb.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Andrew Jeffery <andrew@aj.id.au>,
	Alistair Francis <alistair@alistair23.me>,
	Cameron Esfahani via <qemu-devel@nongnu.org>,
	"patrick@stwcx.xyz" <patrick@stwcx.xyz>,
	qemu-arm <qemu-arm@nongnu.org>, Joel Stanley <joel@jms.id.au>,
	Dan Zhang <zhdaniel@fb.com>
Subject: Re: [PATCH v2 1/2] hw/adc: Add basic Aspeed ADC model
Date: Tue, 5 Oct 2021 09:33:25 +0200	[thread overview]
Message-ID: <802d0795-36ee-938c-9c47-16e8f0b3b173@kaod.org> (raw)
In-Reply-To: <8507A7E7-DA6A-4E73-A4C5-C44780397351@fb.com>

On 10/5/21 07:31, Peter Delevoryas wrote:
> 
> 
>> On Oct 4, 2021, at 12:49 AM, Cédric Le Goater <clg@kaod.org> wrote:
>>
>> On 10/3/21 21:18, pdel@fb.com wrote:
>>> From: Andrew Jeffery <andrew@aj.id.au>
>>> This model implements enough behaviour to do basic functionality tests
>>> such as device initialisation and read out of dummy sample values. The
>>> sample value generation strategy is similar to the STM ADC already in
>>> the tree.
>>> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
>>> [clg : support for multiple engines (AST2600) ]
>>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>>> [pdel : refactored engine register struct fields to regs[] array field]
>>> [pdel : added guest-error checking for upper-8 channel regs in AST2600]
>>> Signed-off-by: Peter Delevoryas <pdel@fb.com>
>>
>> Reviewed-by: Cédric Le Goater <clg@kaod.org>
>>
>> Thanks,
>>
>> C.
> 
> Hey Cedric,
> 
> Actually, I have just submitted a v3 of this patch series to support 16-bit
> reads of the channel data registers. I don’t think I tested using the driver
> to read from the ADC, and that’s what Patrick found crashed with these
> changes. Since it’s relatively easy to enable 16-bit reads, I figured
> I would just include that.

OK.

A Tested-by: tag would be welcome !

Thanks,

C.


  reply	other threads:[~2021-10-05  7:34 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-03 19:18 [PATCH v2 0/2] hw/adc: Add basic Aspeed ADC model pdel
2021-10-03 19:18 ` [PATCH v2 1/2] " pdel
2021-10-04  7:49   ` Cédric Le Goater
2021-10-05  5:31     ` Peter Delevoryas
2021-10-05  7:33       ` Cédric Le Goater [this message]
2021-10-03 19:18 ` [PATCH v2 2/2] hw/arm: Integrate ADC model into Aspeed SoC pdel

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