From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,HK_RANDOM_FROM,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D86EC47083 for ; Wed, 2 Jun 2021 09:48:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 158DC61363 for ; Wed, 2 Jun 2021 09:48:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232488AbhFBJuR (ORCPT ); Wed, 2 Jun 2021 05:50:17 -0400 Received: from mga09.intel.com ([134.134.136.24]:43507 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232385AbhFBJuK (ORCPT ); Wed, 2 Jun 2021 05:50:10 -0400 IronPort-SDR: eQ3HEn+p6ZSFy1PVIGrpmxTVdVuX0X3lHs4PxR7ag/g3E9VXKtDtbkCgjrE/ze2ofpftqdoyy7 FzDlL6eWiWWw== X-IronPort-AV: E=McAfee;i="6200,9189,10002"; a="203744559" X-IronPort-AV: E=Sophos;i="5.83,241,1616482800"; d="scan'208";a="203744559" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2021 02:48:27 -0700 IronPort-SDR: T9kP3vBxFolMa+dSg63YErrLDz4poagG0ixBgmUKb4GyLFYEYHYsB5WrlZUmuz7ADjxozYlrVu LYmtU3EEDBow== X-IronPort-AV: E=Sophos;i="5.83,241,1616482800"; d="scan'208";a="447337560" Received: from tstaplex-mobl1.ger.corp.intel.com (HELO [10.213.195.193]) ([10.213.195.193]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2021 02:48:24 -0700 Subject: Re: [Intel-gfx] [PATCH -next] drm/i915: use DEVICE_ATTR_RO macro From: Tvrtko Ursulin To: YueHaibing , jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, airlied@linux.ie, daniel@ffwll.ch, chris@chris-wilson.co.uk, tvrtko.ursulin@intel.com Cc: intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org References: <20210528100403.21548-1-yuehaibing@huawei.com> <7e60320b-3a1b-0cdc-136d-29c139b27af7@linux.intel.com> Organization: Intel Corporation UK Plc Message-ID: <80d29f19-f429-875f-d255-259a73051f51@linux.intel.com> Date: Wed, 2 Jun 2021 10:48:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <7e60320b-3a1b-0cdc-136d-29c139b27af7@linux.intel.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/06/2021 10:15, Tvrtko Ursulin wrote: > > On 28/05/2021 11:04, YueHaibing wrote: >> Use DEVICE_ATTR_RO() helper instead of plain DEVICE_ATTR(), >> which makes the code a bit shorter and easier to read. >> >> Signed-off-by: YueHaibing >> --- >>   drivers/gpu/drm/i915/i915_pmu.c   |  8 +++----- >>   drivers/gpu/drm/i915/i915_sysfs.c | 30 +++++++++++++++--------------- >>   2 files changed, 18 insertions(+), 20 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_pmu.c >> b/drivers/gpu/drm/i915/i915_pmu.c >> index 41651ac255fa..fb215929b05b 100644 >> --- a/drivers/gpu/drm/i915/i915_pmu.c >> +++ b/drivers/gpu/drm/i915/i915_pmu.c >> @@ -834,15 +834,13 @@ static ssize_t i915_pmu_event_show(struct device >> *dev, >>       return sprintf(buf, "config=0x%lx\n", eattr->val); >>   } >> -static ssize_t >> -i915_pmu_get_attr_cpumask(struct device *dev, >> -              struct device_attribute *attr, >> -              char *buf) >> +static ssize_t cpumask_show(struct device *dev, >> +                struct device_attribute *attr, char *buf) >>   { >>       return cpumap_print_to_pagebuf(true, buf, &i915_pmu_cpumask); >>   } >> -static DEVICE_ATTR(cpumask, 0444, i915_pmu_get_attr_cpumask, NULL); >> +static DEVICE_ATTR_RO(cpumask); >>   static struct attribute *i915_cpumask_attrs[] = { >>       &dev_attr_cpumask.attr, >> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c >> b/drivers/gpu/drm/i915/i915_sysfs.c >> index 4c6b5d52b5ca..183517d1a73d 100644 >> --- a/drivers/gpu/drm/i915/i915_sysfs.c >> +++ b/drivers/gpu/drm/i915/i915_sysfs.c >> @@ -58,8 +58,8 @@ static u32 calc_residency(struct drm_i915_private >> *dev_priv, >>       return DIV_ROUND_CLOSEST_ULL(res, 1000); >>   } >> -static ssize_t >> -show_rc6_mask(struct device *kdev, struct device_attribute *attr, >> char *buf) >> +static ssize_t rc6_enable_show(struct device *kdev, >> +                   struct device_attribute *attr, char *buf) >>   { >>       struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); >>       unsigned int mask; >> @@ -75,43 +75,43 @@ show_rc6_mask(struct device *kdev, struct >> device_attribute *attr, char *buf) >>       return sysfs_emit(buf, "%x\n", mask); >>   } >> -static ssize_t >> -show_rc6_ms(struct device *kdev, struct device_attribute *attr, char >> *buf) >> +static ssize_t rc6_residency_ms_show(struct device *kdev, >> +                     struct device_attribute *attr, char *buf) >>   { >>       struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); >>       u32 rc6_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6); >>       return sysfs_emit(buf, "%u\n", rc6_residency); >>   } >> -static ssize_t >> -show_rc6p_ms(struct device *kdev, struct device_attribute *attr, char >> *buf) >> +static ssize_t rc6p_residency_ms_show(struct device *kdev, >> +                      struct device_attribute *attr, char *buf) >>   { >>       struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); >>       u32 rc6p_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6p); >>       return sysfs_emit(buf, "%u\n", rc6p_residency); >>   } >> -static ssize_t >> -show_rc6pp_ms(struct device *kdev, struct device_attribute *attr, >> char *buf) >> +static ssize_t rc6pp_residency_ms_show(struct device *kdev, >> +                       struct device_attribute *attr, char *buf) >>   { >>       struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); >>       u32 rc6pp_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6pp); >>       return sysfs_emit(buf, "%u\n", rc6pp_residency); >>   } >> -static ssize_t >> -show_media_rc6_ms(struct device *kdev, struct device_attribute *attr, >> char *buf) >> +static ssize_t media_rc6_residency_ms_show(struct device *kdev, >> +                       struct device_attribute *attr, char *buf) >>   { >>       struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); >>       u32 rc6_residency = calc_residency(dev_priv, VLV_GT_MEDIA_RC6); >>       return sysfs_emit(buf, "%u\n", rc6_residency); >>   } >> -static DEVICE_ATTR(rc6_enable, S_IRUGO, show_rc6_mask, NULL); >> -static DEVICE_ATTR(rc6_residency_ms, S_IRUGO, show_rc6_ms, NULL); >> -static DEVICE_ATTR(rc6p_residency_ms, S_IRUGO, show_rc6p_ms, NULL); >> -static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO, show_rc6pp_ms, NULL); >> -static DEVICE_ATTR(media_rc6_residency_ms, S_IRUGO, >> show_media_rc6_ms, NULL); >> +static DEVICE_ATTR_RO(rc6_enable); >> +static DEVICE_ATTR_RO(rc6_residency_ms); >> +static DEVICE_ATTR_RO(rc6p_residency_ms); >> +static DEVICE_ATTR_RO(rc6pp_residency_ms); >> +static DEVICE_ATTR_RO(media_rc6_residency_ms); >>   static struct attribute *rc6_attrs[] = { >>       &dev_attr_rc6_enable.attr, >> > > Reviewed-by: Tvrtko Ursulin Pushed thanks for the patch! Regards, Tvrtko From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.9 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,HK_RANDOM_FROM,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4EA1C4708F for ; Wed, 2 Jun 2021 09:48:33 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B158B613BF for ; Wed, 2 Jun 2021 09:48:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B158B613BF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 53EE56EC2D; Wed, 2 Jun 2021 09:48:32 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7F3466E964; Wed, 2 Jun 2021 09:48:31 +0000 (UTC) IronPort-SDR: oo2c9f+ZxvI+Y7L2/jUN1HEBRTGIXpQZLqIILW+1dy1pQpfJ4SaVP87uFzalnLxVDvExZc9BXg Vijm+qRJ8jJA== X-IronPort-AV: E=McAfee;i="6200,9189,10002"; a="190862937" X-IronPort-AV: E=Sophos;i="5.83,241,1616482800"; d="scan'208";a="190862937" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2021 02:48:27 -0700 IronPort-SDR: T9kP3vBxFolMa+dSg63YErrLDz4poagG0ixBgmUKb4GyLFYEYHYsB5WrlZUmuz7ADjxozYlrVu LYmtU3EEDBow== X-IronPort-AV: E=Sophos;i="5.83,241,1616482800"; d="scan'208";a="447337560" Received: from tstaplex-mobl1.ger.corp.intel.com (HELO [10.213.195.193]) ([10.213.195.193]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2021 02:48:24 -0700 From: Tvrtko Ursulin To: YueHaibing , jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, airlied@linux.ie, daniel@ffwll.ch, chris@chris-wilson.co.uk, tvrtko.ursulin@intel.com References: <20210528100403.21548-1-yuehaibing@huawei.com> <7e60320b-3a1b-0cdc-136d-29c139b27af7@linux.intel.com> Organization: Intel Corporation UK Plc Message-ID: <80d29f19-f429-875f-d255-259a73051f51@linux.intel.com> Date: Wed, 2 Jun 2021 10:48:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <7e60320b-3a1b-0cdc-136d-29c139b27af7@linux.intel.com> Content-Language: en-US Subject: Re: [Intel-gfx] [PATCH -next] drm/i915: use DEVICE_ATTR_RO macro X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Ck9uIDAxLzA2LzIwMjEgMTA6MTUsIFR2cnRrbyBVcnN1bGluIHdyb3RlOgo+IAo+IE9uIDI4LzA1 LzIwMjEgMTE6MDQsIFl1ZUhhaWJpbmcgd3JvdGU6Cj4+IFVzZSBERVZJQ0VfQVRUUl9STygpIGhl bHBlciBpbnN0ZWFkIG9mIHBsYWluIERFVklDRV9BVFRSKCksCj4+IHdoaWNoIG1ha2VzIHRoZSBj b2RlIGEgYml0IHNob3J0ZXIgYW5kIGVhc2llciB0byByZWFkLgo+Pgo+PiBTaWduZWQtb2ZmLWJ5 OiBZdWVIYWliaW5nIDx5dWVoYWliaW5nQGh1YXdlaS5jb20+Cj4+IC0tLQo+PiDCoCBkcml2ZXJz L2dwdS9kcm0vaTkxNS9pOTE1X3BtdS5jwqDCoCB8wqAgOCArKystLS0tLQo+PiDCoCBkcml2ZXJz L2dwdS9kcm0vaTkxNS9pOTE1X3N5c2ZzLmMgfCAzMCArKysrKysrKysrKysrKystLS0tLS0tLS0t LS0tLS0KPj4gwqAgMiBmaWxlcyBjaGFuZ2VkLCAxOCBpbnNlcnRpb25zKCspLCAyMCBkZWxldGlv bnMoLSkKPj4KPj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcG11LmMg Cj4+IGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9wbXUuYwo+PiBpbmRleCA0MTY1MWFjMjU1 ZmEuLmZiMjE1OTI5YjA1YiAxMDA2NDQKPj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkx NV9wbXUuYwo+PiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3BtdS5jCj4+IEBAIC04 MzQsMTUgKzgzNCwxMyBAQCBzdGF0aWMgc3NpemVfdCBpOTE1X3BtdV9ldmVudF9zaG93KHN0cnVj dCBkZXZpY2UgCj4+ICpkZXYsCj4+IMKgwqDCoMKgwqAgcmV0dXJuIHNwcmludGYoYnVmLCAiY29u ZmlnPTB4JWx4XG4iLCBlYXR0ci0+dmFsKTsKPj4gwqAgfQo+PiAtc3RhdGljIHNzaXplX3QKPj4g LWk5MTVfcG11X2dldF9hdHRyX2NwdW1hc2soc3RydWN0IGRldmljZSAqZGV2LAo+PiAtwqDCoMKg wqDCoMKgwqDCoMKgwqDCoMKgwqAgc3RydWN0IGRldmljZV9hdHRyaWJ1dGUgKmF0dHIsCj4+IC3C oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCBjaGFyICpidWYpCj4+ICtzdGF0aWMgc3NpemVfdCBj cHVtYXNrX3Nob3coc3RydWN0IGRldmljZSAqZGV2LAo+PiArwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgIHN0cnVjdCBkZXZpY2VfYXR0cmlidXRlICphdHRyLCBjaGFyICpidWYpCj4+IMKg IHsKPj4gwqDCoMKgwqDCoCByZXR1cm4gY3B1bWFwX3ByaW50X3RvX3BhZ2VidWYodHJ1ZSwgYnVm LCAmaTkxNV9wbXVfY3B1bWFzayk7Cj4+IMKgIH0KPj4gLXN0YXRpYyBERVZJQ0VfQVRUUihjcHVt YXNrLCAwNDQ0LCBpOTE1X3BtdV9nZXRfYXR0cl9jcHVtYXNrLCBOVUxMKTsKPj4gK3N0YXRpYyBE RVZJQ0VfQVRUUl9STyhjcHVtYXNrKTsKPj4gwqAgc3RhdGljIHN0cnVjdCBhdHRyaWJ1dGUgKmk5 MTVfY3B1bWFza19hdHRyc1tdID0gewo+PiDCoMKgwqDCoMKgICZkZXZfYXR0cl9jcHVtYXNrLmF0 dHIsCj4+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3N5c2ZzLmMgCj4+ IGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9zeXNmcy5jCj4+IGluZGV4IDRjNmI1ZDUyYjVj YS4uMTgzNTE3ZDFhNzNkIDEwMDY0NAo+PiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1 X3N5c2ZzLmMKPj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9zeXNmcy5jCj4+IEBA IC01OCw4ICs1OCw4IEBAIHN0YXRpYyB1MzIgY2FsY19yZXNpZGVuY3koc3RydWN0IGRybV9pOTE1 X3ByaXZhdGUgCj4+ICpkZXZfcHJpdiwKPj4gwqDCoMKgwqDCoCByZXR1cm4gRElWX1JPVU5EX0NM T1NFU1RfVUxMKHJlcywgMTAwMCk7Cj4+IMKgIH0KPj4gLXN0YXRpYyBzc2l6ZV90Cj4+IC1zaG93 X3JjNl9tYXNrKHN0cnVjdCBkZXZpY2UgKmtkZXYsIHN0cnVjdCBkZXZpY2VfYXR0cmlidXRlICph dHRyLCAKPj4gY2hhciAqYnVmKQo+PiArc3RhdGljIHNzaXplX3QgcmM2X2VuYWJsZV9zaG93KHN0 cnVjdCBkZXZpY2UgKmtkZXYsCj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKg wqAgc3RydWN0IGRldmljZV9hdHRyaWJ1dGUgKmF0dHIsIGNoYXIgKmJ1ZikKPj4gwqAgewo+PiDC oMKgwqDCoMKgIHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdiA9IGtkZXZfbWlub3Jf dG9faTkxNShrZGV2KTsKPj4gwqDCoMKgwqDCoCB1bnNpZ25lZCBpbnQgbWFzazsKPj4gQEAgLTc1 LDQzICs3NSw0MyBAQCBzaG93X3JjNl9tYXNrKHN0cnVjdCBkZXZpY2UgKmtkZXYsIHN0cnVjdCAK Pj4gZGV2aWNlX2F0dHJpYnV0ZSAqYXR0ciwgY2hhciAqYnVmKQo+PiDCoMKgwqDCoMKgIHJldHVy biBzeXNmc19lbWl0KGJ1ZiwgIiV4XG4iLCBtYXNrKTsKPj4gwqAgfQo+PiAtc3RhdGljIHNzaXpl X3QKPj4gLXNob3dfcmM2X21zKHN0cnVjdCBkZXZpY2UgKmtkZXYsIHN0cnVjdCBkZXZpY2VfYXR0 cmlidXRlICphdHRyLCBjaGFyIAo+PiAqYnVmKQo+PiArc3RhdGljIHNzaXplX3QgcmM2X3Jlc2lk ZW5jeV9tc19zaG93KHN0cnVjdCBkZXZpY2UgKmtkZXYsCj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgIHN0cnVjdCBkZXZpY2VfYXR0cmlidXRlICphdHRyLCBjaGFy ICpidWYpCj4+IMKgIHsKPj4gwqDCoMKgwqDCoCBzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2 X3ByaXYgPSBrZGV2X21pbm9yX3RvX2k5MTUoa2Rldik7Cj4+IMKgwqDCoMKgwqAgdTMyIHJjNl9y ZXNpZGVuY3kgPSBjYWxjX3Jlc2lkZW5jeShkZXZfcHJpdiwgR0VONl9HVF9HRlhfUkM2KTsKPj4g wqDCoMKgwqDCoCByZXR1cm4gc3lzZnNfZW1pdChidWYsICIldVxuIiwgcmM2X3Jlc2lkZW5jeSk7 Cj4+IMKgIH0KPj4gLXN0YXRpYyBzc2l6ZV90Cj4+IC1zaG93X3JjNnBfbXMoc3RydWN0IGRldmlj ZSAqa2Rldiwgc3RydWN0IGRldmljZV9hdHRyaWJ1dGUgKmF0dHIsIGNoYXIgCj4+ICpidWYpCj4+ ICtzdGF0aWMgc3NpemVfdCByYzZwX3Jlc2lkZW5jeV9tc19zaG93KHN0cnVjdCBkZXZpY2UgKmtk ZXYsCj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgc3RydWN0 IGRldmljZV9hdHRyaWJ1dGUgKmF0dHIsIGNoYXIgKmJ1ZikKPj4gwqAgewo+PiDCoMKgwqDCoMKg IHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdiA9IGtkZXZfbWlub3JfdG9faTkxNShr ZGV2KTsKPj4gwqDCoMKgwqDCoCB1MzIgcmM2cF9yZXNpZGVuY3kgPSBjYWxjX3Jlc2lkZW5jeShk ZXZfcHJpdiwgR0VONl9HVF9HRlhfUkM2cCk7Cj4+IMKgwqDCoMKgwqAgcmV0dXJuIHN5c2ZzX2Vt aXQoYnVmLCAiJXVcbiIsIHJjNnBfcmVzaWRlbmN5KTsKPj4gwqAgfQo+PiAtc3RhdGljIHNzaXpl X3QKPj4gLXNob3dfcmM2cHBfbXMoc3RydWN0IGRldmljZSAqa2Rldiwgc3RydWN0IGRldmljZV9h dHRyaWJ1dGUgKmF0dHIsIAo+PiBjaGFyICpidWYpCj4+ICtzdGF0aWMgc3NpemVfdCByYzZwcF9y ZXNpZGVuY3lfbXNfc2hvdyhzdHJ1Y3QgZGV2aWNlICprZGV2LAo+PiArwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgc3RydWN0IGRldmljZV9hdHRyaWJ1dGUgKmF0 dHIsIGNoYXIgKmJ1ZikKPj4gwqAgewo+PiDCoMKgwqDCoMKgIHN0cnVjdCBkcm1faTkxNV9wcml2 YXRlICpkZXZfcHJpdiA9IGtkZXZfbWlub3JfdG9faTkxNShrZGV2KTsKPj4gwqDCoMKgwqDCoCB1 MzIgcmM2cHBfcmVzaWRlbmN5ID0gY2FsY19yZXNpZGVuY3koZGV2X3ByaXYsIEdFTjZfR1RfR0ZY X1JDNnBwKTsKPj4gwqDCoMKgwqDCoCByZXR1cm4gc3lzZnNfZW1pdChidWYsICIldVxuIiwgcmM2 cHBfcmVzaWRlbmN5KTsKPj4gwqAgfQo+PiAtc3RhdGljIHNzaXplX3QKPj4gLXNob3dfbWVkaWFf cmM2X21zKHN0cnVjdCBkZXZpY2UgKmtkZXYsIHN0cnVjdCBkZXZpY2VfYXR0cmlidXRlICphdHRy LCAKPj4gY2hhciAqYnVmKQo+PiArc3RhdGljIHNzaXplX3QgbWVkaWFfcmM2X3Jlc2lkZW5jeV9t c19zaG93KHN0cnVjdCBkZXZpY2UgKmtkZXYsCj4+ICvCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoCBzdHJ1Y3QgZGV2aWNlX2F0dHJpYnV0ZSAqYXR0ciwgY2hhciAq YnVmKQo+PiDCoCB7Cj4+IMKgwqDCoMKgwqAgc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmRldl9w cml2ID0ga2Rldl9taW5vcl90b19pOTE1KGtkZXYpOwo+PiDCoMKgwqDCoMKgIHUzMiByYzZfcmVz aWRlbmN5ID0gY2FsY19yZXNpZGVuY3koZGV2X3ByaXYsIFZMVl9HVF9NRURJQV9SQzYpOwo+PiDC oMKgwqDCoMKgIHJldHVybiBzeXNmc19lbWl0KGJ1ZiwgIiV1XG4iLCByYzZfcmVzaWRlbmN5KTsK Pj4gwqAgfQo+PiAtc3RhdGljIERFVklDRV9BVFRSKHJjNl9lbmFibGUsIFNfSVJVR08sIHNob3df cmM2X21hc2ssIE5VTEwpOwo+PiAtc3RhdGljIERFVklDRV9BVFRSKHJjNl9yZXNpZGVuY3lfbXMs IFNfSVJVR08sIHNob3dfcmM2X21zLCBOVUxMKTsKPj4gLXN0YXRpYyBERVZJQ0VfQVRUUihyYzZw X3Jlc2lkZW5jeV9tcywgU19JUlVHTywgc2hvd19yYzZwX21zLCBOVUxMKTsKPj4gLXN0YXRpYyBE RVZJQ0VfQVRUUihyYzZwcF9yZXNpZGVuY3lfbXMsIFNfSVJVR08sIHNob3dfcmM2cHBfbXMsIE5V TEwpOwo+PiAtc3RhdGljIERFVklDRV9BVFRSKG1lZGlhX3JjNl9yZXNpZGVuY3lfbXMsIFNfSVJV R08sIAo+PiBzaG93X21lZGlhX3JjNl9tcywgTlVMTCk7Cj4+ICtzdGF0aWMgREVWSUNFX0FUVFJf Uk8ocmM2X2VuYWJsZSk7Cj4+ICtzdGF0aWMgREVWSUNFX0FUVFJfUk8ocmM2X3Jlc2lkZW5jeV9t cyk7Cj4+ICtzdGF0aWMgREVWSUNFX0FUVFJfUk8ocmM2cF9yZXNpZGVuY3lfbXMpOwo+PiArc3Rh dGljIERFVklDRV9BVFRSX1JPKHJjNnBwX3Jlc2lkZW5jeV9tcyk7Cj4+ICtzdGF0aWMgREVWSUNF X0FUVFJfUk8obWVkaWFfcmM2X3Jlc2lkZW5jeV9tcyk7Cj4+IMKgIHN0YXRpYyBzdHJ1Y3QgYXR0 cmlidXRlICpyYzZfYXR0cnNbXSA9IHsKPj4gwqDCoMKgwqDCoCAmZGV2X2F0dHJfcmM2X2VuYWJs ZS5hdHRyLAo+Pgo+IAo+IFJldmlld2VkLWJ5OiBUdnJ0a28gVXJzdWxpbiA8dHZydGtvLnVyc3Vs aW5AaW50ZWwuY29tPgoKUHVzaGVkIHRoYW5rcyBmb3IgdGhlIHBhdGNoIQoKUmVnYXJkcywKClR2 cnRrbwpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRl bC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6 Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK