From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 930DCC433E0 for ; Thu, 14 Jan 2021 09:40:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 477DF23A33 for ; Thu, 14 Jan 2021 09:40:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728428AbhANJkQ convert rfc822-to-8bit (ORCPT ); Thu, 14 Jan 2021 04:40:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728386AbhANJkE (ORCPT ); Thu, 14 Jan 2021 04:40:04 -0500 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC74BC061786 for ; Thu, 14 Jan 2021 01:39:31 -0800 (PST) Received: from lupine.hi.pengutronix.de ([2001:67c:670:100:3ad5:47ff:feaf:1a17] helo=lupine) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kzz6B-00043Z-JS; Thu, 14 Jan 2021 10:39:23 +0100 Received: from pza by lupine with local (Exim 4.92) (envelope-from ) id 1kzz6B-0003ko-6U; Thu, 14 Jan 2021 10:39:23 +0100 Message-ID: <80d4d9b16628847c59a7f94a7c002d8ce859b0ca.camel@pengutronix.de> Subject: Re: [PATCH 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings From: Philipp Zabel To: Steen Hegelund , Rob Herring Cc: Microchip Linux Driver Support , Alexandre Belloni , Gregory Clement , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Date: Thu, 14 Jan 2021 10:39:23 +0100 In-Reply-To: <20210113201915.2734205-2-steen.hegelund@microchip.com> References: <20210113201915.2734205-1-steen.hegelund@microchip.com> <20210113201915.2734205-2-steen.hegelund@microchip.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT User-Agent: Evolution 3.30.5-1.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:3ad5:47ff:feaf:1a17 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Steen, On Wed, 2021-01-13 at 21:19 +0100, Steen Hegelund wrote: > Signed-off-by: Steen Hegelund > --- > .../bindings/reset/microchip,rst.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml > > diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml > new file mode 100644 > index 000000000000..b5526753e85d > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Microchip Sparx5 Switch Reset Controller > + > +maintainers: > + - Steen Hegelund > + - Lars Povlsen > + > +description: | > + The Microchip Sparx5 Switch provides reset control and implements the following > + functions > + - One Time Switch Core Reset (Soft Reset) > + > +properties: > + $nodename: > + pattern: "^reset-controller@[0-9a-f]+$" > + > + compatible: > + const: microchip,sparx5-switch-reset > + > + reg: > + maxItems: 1 > + > + "#reset-cells": > + const: 1 > + > + syscons: > + $ref: "/schemas/types.yaml#/definitions/phandle-array" > + description: Array of syscons used to access reset registers > + minItems: 2 The order seems to be important in the driver, so this should specify which is the CPU syscon and which is the GCB syscon. I'm not sure if it would be better to have two separately named syscon properties with a single phandle each. regards Philipp From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 243C0C433E6 for ; Thu, 14 Jan 2021 09:41:56 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CFEBB23A21 for ; Thu, 14 Jan 2021 09:41:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CFEBB23A21 Authentication-Results: mail.kernel.org; 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Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kzz6q-0001kb-CN; Thu, 14 Jan 2021 09:40:04 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kzz6H-0001W1-SH for linux-arm-kernel@lists.infradead.org; Thu, 14 Jan 2021 09:39:34 +0000 Received: from lupine.hi.pengutronix.de ([2001:67c:670:100:3ad5:47ff:feaf:1a17] helo=lupine) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kzz6B-00043Z-JS; Thu, 14 Jan 2021 10:39:23 +0100 Received: from pza by lupine with local (Exim 4.92) (envelope-from ) id 1kzz6B-0003ko-6U; Thu, 14 Jan 2021 10:39:23 +0100 Message-ID: <80d4d9b16628847c59a7f94a7c002d8ce859b0ca.camel@pengutronix.de> Subject: Re: [PATCH 1/3] dt-bindings: reset: microchip sparx5 reset driver bindings From: Philipp Zabel To: Steen Hegelund , Rob Herring Date: Thu, 14 Jan 2021 10:39:23 +0100 In-Reply-To: <20210113201915.2734205-2-steen.hegelund@microchip.com> References: <20210113201915.2734205-1-steen.hegelund@microchip.com> <20210113201915.2734205-2-steen.hegelund@microchip.com> User-Agent: Evolution 3.30.5-1.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:3ad5:47ff:feaf:1a17 X-SA-Exim-Mail-From: p.zabel@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210114_043930_034240_FC7E2C86 X-CRM114-Status: GOOD ( 17.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Alexandre Belloni , Gregory Clement , linux-kernel@vger.kernel.org, Microchip Linux Driver Support , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Steen, On Wed, 2021-01-13 at 21:19 +0100, Steen Hegelund wrote: > Signed-off-by: Steen Hegelund > --- > .../bindings/reset/microchip,rst.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml > > diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml > new file mode 100644 > index 000000000000..b5526753e85d > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/microchip,rst.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Microchip Sparx5 Switch Reset Controller > + > +maintainers: > + - Steen Hegelund > + - Lars Povlsen > + > +description: | > + The Microchip Sparx5 Switch provides reset control and implements the following > + functions > + - One Time Switch Core Reset (Soft Reset) > + > +properties: > + $nodename: > + pattern: "^reset-controller@[0-9a-f]+$" > + > + compatible: > + const: microchip,sparx5-switch-reset > + > + reg: > + maxItems: 1 > + > + "#reset-cells": > + const: 1 > + > + syscons: > + $ref: "/schemas/types.yaml#/definitions/phandle-array" > + description: Array of syscons used to access reset registers > + minItems: 2 The order seems to be important in the driver, so this should specify which is the CPU syscon and which is the GCB syscon. I'm not sure if it would be better to have two separately named syscon properties with a single phandle each. regards Philipp _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel