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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Michael Rolnik <mrolnik@gmail.com>, qemu-devel@nongnu.org
Cc: thuth@redhat.com, richard.henderson@linaro.org,
	Sarah Harris <S.E.Harris@kent.ac.uk>,
	dovgaluk@ispras.ru, imammedo@redhat.com,
	aleksandar.m.mail@gmail.com
Subject: Re: [PATCH v36 11/17] target/avr: Add limited support for USART and 16 bit timer peripherals
Date: Wed, 27 Nov 2019 18:07:33 +0100	[thread overview]
Message-ID: <81b62c00-243e-b76e-f52c-4f681b47b727@redhat.com> (raw)
In-Reply-To: <20191124050225.30351-12-mrolnik@gmail.com>

On 11/24/19 6:02 AM, Michael Rolnik wrote:
> From: Sarah Harris <S.E.Harris@kent.ac.uk>
> 
> These were designed to facilitate testing but should provide enough function to be useful in other contexts.
> Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins).
> 
> Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk>
> ---
>   include/hw/char/avr_usart.h    |  97 ++++++
>   include/hw/misc/avr_mask.h     |  47 +++
>   include/hw/timer/avr_timer16.h |  97 ++++++
>   hw/char/avr_usart.c            | 324 ++++++++++++++++++
>   hw/misc/avr_mask.c             | 112 ++++++
>   hw/timer/avr_timer16.c         | 605 +++++++++++++++++++++++++++++++++
>   hw/char/Kconfig                |   3 +
>   hw/char/Makefile.objs          |   1 +
>   hw/misc/Kconfig                |   3 +
>   hw/misc/Makefile.objs          |   2 +
>   hw/timer/Kconfig               |   3 +
>   hw/timer/Makefile.objs         |   2 +
>   12 files changed, 1296 insertions(+)
>   create mode 100644 include/hw/char/avr_usart.h
>   create mode 100644 include/hw/misc/avr_mask.h
>   create mode 100644 include/hw/timer/avr_timer16.h
>   create mode 100644 hw/char/avr_usart.c
>   create mode 100644 hw/misc/avr_mask.c
>   create mode 100644 hw/timer/avr_timer16.c
> 
> diff --git a/include/hw/char/avr_usart.h b/include/hw/char/avr_usart.h
> new file mode 100644
> index 0000000000..8e9ee88bbd
> --- /dev/null
> +++ b/include/hw/char/avr_usart.h
> @@ -0,0 +1,97 @@
> +/*
> + * AVR USART
> + *
> + * Copyright (c) 2018 University of Kent
> + * Author: Sarah Harris
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a copy
> + * of this software and associated documentation files (the "Software"), to deal
> + * in the Software without restriction, including without limitation the rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#ifndef HW_AVR_USART_H
> +#define HW_AVR_USART_H
> +
> +#include "hw/sysbus.h"
> +#include "chardev/char-fe.h"
> +#include "hw/hw.h"
> +
> +/* Offsets of registers. */
> +#define USART_DR   0x06
> +#define USART_CSRA  0x00
> +#define USART_CSRB  0x01
> +#define USART_CSRC  0x02
> +#define USART_BRRH 0x05
> +#define USART_BRRL 0x04
> +
> +/* Relevant bits in regiters. */
> +#define USART_CSRA_RXC    (1 << 7)
> +#define USART_CSRA_TXC    (1 << 6)
> +#define USART_CSRA_DRE    (1 << 5)
> +#define USART_CSRA_MPCM   (1 << 0)
> +
> +#define USART_CSRB_RXCIE  (1 << 7)
> +#define USART_CSRB_TXCIE  (1 << 6)
> +#define USART_CSRB_DREIE  (1 << 5)
> +#define USART_CSRB_RXEN   (1 << 4)
> +#define USART_CSRB_TXEN   (1 << 3)
> +#define USART_CSRB_CSZ2   (1 << 2)
> +#define USART_CSRB_RXB8   (1 << 1)
> +#define USART_CSRB_TXB8   (1 << 0)
> +
> +#define USART_CSRC_MSEL1  (1 << 7)
> +#define USART_CSRC_MSEL0  (1 << 6)
> +#define USART_CSRC_PM1    (1 << 5)
> +#define USART_CSRC_PM0    (1 << 4)
> +#define USART_CSRC_CSZ1   (1 << 2)
> +#define USART_CSRC_CSZ0   (1 << 1)

The previous definitions can go into hw/char/avr_usart.c.

> +#define TYPE_AVR_USART "avr-usart"
> +#define AVR_USART(obj) \
> +    OBJECT_CHECK(AVRUsartState, (obj), TYPE_AVR_USART)
> +
> +typedef struct {
> +    /* <private> */
> +    SysBusDevice parent_obj;
> +
> +    /* <public> */
> +    MemoryRegion mmio;
> +
> +    CharBackend chr;
> +
> +    bool enabled;
> +
> +    uint8_t data;
> +    bool data_valid;
> +    uint8_t char_mask;
> +    /* Control and Status Registers */
> +    uint8_t csra;
> +    uint8_t csrb;
> +    uint8_t csrc;
> +    /* Baud Rate Registers (low/high byte) */
> +    uint8_t brrh;
> +    uint8_t brrl;
> +
> +    /* Receive Complete */
> +    qemu_irq rxc_irq;
> +    /* Transmit Complete */
> +    qemu_irq txc_irq;
> +    /* Data Register Empty */
> +    qemu_irq dre_irq;
> +} AVRUsartState;

Please rename to AvrUsartState (see 'Naming' section of CODING_STYLE.rst).

[...]



  parent reply	other threads:[~2019-11-27 17:08 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-24  5:02 [PATCH v36 00/17] QEMU AVR 8 bit cores Michael Rolnik
2019-11-24  5:02 ` [PATCH v36 01/17] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-11-24 15:17   ` Aleksandar Markovic
2019-11-25 18:51     ` Thomas Huth
2019-11-25 19:06       ` Aleksandar Markovic
2019-11-24 16:21   ` Aleksandar Markovic
2019-11-24 20:08     ` Aleksandar Markovic
2019-11-26 22:54     ` Philippe Mathieu-Daudé
2019-11-25  1:29   ` Aleksandar Markovic
2019-11-26  1:25   ` Aleksandar Markovic
2019-11-24  5:02 ` [PATCH v36 02/17] target/avr: Add instruction helpers Michael Rolnik
2019-11-24  5:02 ` [PATCH v36 03/17] target/avr: Add instruction decoding Michael Rolnik
2019-11-24 15:22   ` Aleksandar Markovic
2019-11-24  5:02 ` [PATCH v36 04/17] target/avr: Add instruction translation - Registers definition Michael Rolnik
2019-11-26 19:48   ` Aleksandar Markovic
2019-11-26 20:40     ` Michael Rolnik
2019-11-26 23:06   ` Philippe Mathieu-Daudé
2019-11-24  5:02 ` [PATCH v36 05/17] target/avr: Add instruction translation - Arithmetic and Logic Instructions Michael Rolnik
2019-11-26 23:04   ` Philippe Mathieu-Daudé
2019-11-24  5:02 ` [PATCH v36 06/17] target/avr: Add instruction translation - Branch Instructions Michael Rolnik
2019-11-26 23:04   ` Philippe Mathieu-Daudé
2019-11-24  5:02 ` [PATCH v36 07/17] target/avr: Add instruction translation - Bit and Bit-test Instructions Michael Rolnik
2019-11-24  5:02 ` [PATCH v36 08/17] target/avr: Add instruction translation - MCU Control Instructions Michael Rolnik
2019-11-24  5:02 ` [PATCH v36 09/17] target/avr: Add instruction translation - CPU main translation function Michael Rolnik
2019-11-24  5:02 ` [PATCH v36 10/17] target/avr: Add instruction disassembly function Michael Rolnik
2019-11-24 15:02   ` Aleksandar Markovic
2019-11-24 15:05   ` Aleksandar Markovic
2019-11-26  1:11   ` Aleksandar Markovic
2019-11-26 19:52   ` Aleksandar Markovic
2019-11-26 20:32     ` Michael Rolnik
2019-11-26 22:24       ` Aleksandar Markovic
2019-11-26 23:14   ` Aleksandar Markovic
2019-11-26 23:59   ` Philippe Mathieu-Daudé
2019-11-27  6:21     ` Michael Rolnik
2019-11-24  5:02 ` [PATCH v36 11/17] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-11-24 14:58   ` Aleksandar Markovic
2019-11-27 17:07   ` Philippe Mathieu-Daudé [this message]
2019-11-27 18:43     ` Aleksandar Markovic
2019-11-27 18:46       ` Michael Rolnik
2019-11-27 19:29         ` Aleksandar Markovic
2019-11-27 20:02       ` Aleksandar Markovic
2019-11-24  5:02 ` [PATCH v36 12/17] target/avr: Add example board configuration Michael Rolnik
2019-11-26  1:08   ` Aleksandar Markovic
2019-11-26 23:03     ` Philippe Mathieu-Daudé
2019-11-24  5:02 ` [PATCH v36 13/17] target/avr: Register AVR support with the rest of QEMU Michael Rolnik
2019-11-24  5:02 ` [PATCH v36 14/17] target/avr: Update build system Michael Rolnik
2019-11-24  5:02 ` [PATCH v36 15/17] target/avr: Add boot serial test Michael Rolnik
2019-11-24  5:02 ` [PATCH v36 16/17] target/avr: Add Avocado test Michael Rolnik
2019-11-24 15:18   ` Aleksandar Markovic
2019-11-26 23:14   ` Philippe Mathieu-Daudé
2019-11-24  5:02 ` [PATCH v36 17/17] target/avr: Update MAINTAINERS file Michael Rolnik
2019-11-25 23:49   ` Aleksandar Markovic
2019-11-26  2:06     ` Cleber Rosa
2019-11-27 23:53     ` Eduardo Habkost
2019-11-26  3:17   ` Aleksandar Markovic
2019-11-26 19:05     ` Michael Rolnik
2019-11-26 19:39       ` Aleksandar Markovic
2019-11-26 20:41         ` Michael Rolnik
2019-11-28  9:34           ` Sarah Harris
2019-11-25  8:47 ` [PATCH v36 00/17] QEMU AVR 8 bit cores Philippe Mathieu-Daudé
2019-11-25 23:58 ` Aleksandar Markovic
2019-11-26  1:22 ` Aleksandar Markovic
2019-11-26 23:21 ` Aleksandar Markovic

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