From: Bean Huo <beanhuo@iokpp.de>
To: Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com>,
bhelgaas@google.com, schnelle@linux.ibm.com
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Bean Huo <beanhuo@micron.com>,
stable@vger.kernel.org
Subject: Re: [PATCH v2] PCI: Increase maximum PCIe physical function number to 7 for non-ARI devices
Date: Mon, 19 Feb 2024 11:50:23 +0100 [thread overview]
Message-ID: <82320769f502c5fadad90f1ec8d782c6ef423f56.camel@iokpp.de> (raw)
In-Reply-To: <4858e202-6097-493a-8405-86d3e8e17c83@linux.intel.com>
On Fri, 2024-02-16 at 14:26 -0800, Kuppuswamy Sathyanarayanan wrote:
> It looks like for an ARI capable device the limit is 256. Why not add
> that
> check as well?
" With ARI, the 16-bit field is interpreted as two fields
instead of three: an 8-bit Bus Number and an 8-bit Function Number -
the Device Number field is eliminated. This new
interpretation enables an ARI Device to support up to 256 Functions
[0..255] instead of 8 Functions [0..7]."
the above statement on PCIe Spec highlights that since the Function
Number field in an ARI-enabled device is 8 bits, it inherently supports
numbering from 0 to 255. Thus, there's no need for additional checks to
limit the function number to this range; the 8-bit size of the field
naturally imposes this limit. This efficient use of the available
address space aligns with the goals of ARI to enhance device
functionality within the PCIe specification.
Kind regards,
Bean
prev parent reply other threads:[~2024-02-19 10:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-16 19:01 [PATCH v2] PCI: Increase maximum PCIe physical function number to 7 for non-ARI devices Bean Huo
2024-02-16 22:26 ` Kuppuswamy Sathyanarayanan
2024-02-16 22:41 ` Bjorn Helgaas
2024-02-19 10:50 ` Bean Huo [this message]
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