From: "Kang, Luwei" <luwei.kang@intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: "Tian, Kevin" <kevin.tian@intel.com>,
Stefano Stabellini <sstabellini@kernel.org>,
Wei Liu <wei.liu2@citrix.com>,
George Dunlap <George.Dunlap@eu.citrix.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Tim Deegan <tim@xen.org>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
"Nakajima, Jun" <jun.nakajima@intel.com>
Subject: Re: [PATCH RESEND v1 1/7] x86: add a flag to enable Intel processor trace
Date: Fri, 27 Apr 2018 23:16:36 +0000 [thread overview]
Message-ID: <82D7661F83C1A047AF7DC287873BF1E167F6832C@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <5AE31FA502000078001BF1F8@prv1-mh.provo.novell.com>
> >>> On 27.04.18 at 10:22, <luwei.kang@intel.com> wrote:
> >> > diff --git a/docs/misc/xen-command-line.markdown
> >> > b/docs/misc/xen-command-line.markdown
> >> > index 781110d..95411cf 100644
> >> > --- a/docs/misc/xen-command-line.markdown
> >> > +++ b/docs/misc/xen-command-line.markdown
> >> > @@ -1009,6 +1009,13 @@ debug hypervisor only).
> >> > ### idle\_latency\_factor
> >> > > `= <integer>`
> >> >
> >> > +### intel\_pt
> >> > +> `= <boolean>`
> >> > +
> >> > +> Default: `true`
> >> > +
> >>
> >> After reading the manual a bit I think this option needs to be more
> >> sophisticated.
> >>
> >> The series only implements guest-only tracing, while in the future we
> >> might want host-only tracing and system wide tracing.
> >>
> >> Even the other modes aren't implemented yet we should leave room for
> >> them.
> >>
> >
> > Hi Wei,
> > Thanks for the review. So what about define guest mode like this
> > and make the option as a string. Other mode can be added like 'system
> > | host' in future.
> >
> > ### Intel\_pt
> >> `= guest`
>
> That's still too simple, as you implement it for HVM only. While it's not clear
> to me whether it could be done properly for PV, that path shouldn't be
> closed unless it's crystal clear that it's impossible to ever happen.
The great change in Intel Processor Trace improvements is CPU will treat PT output addresses as Guest Physical Addresses (GPAs) and translate them using EPT. So if EPT is not supported or disabled in PV guest, intel PT feature can't be exposed to guest.
System wide mode may have a little different, we can disable intel address translated by EPT and enable PT in dom0 to record the behavior of hypervisor and guest. Although Intel PT is still enabled(IA32_RTIT_CTL.EN=1) in guest but actually guest don't aware this. This mode is not implemented in this patch set and may need more discussion in next step.
>
> Jan
>
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next prev parent reply other threads:[~2018-04-27 23:16 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-15 18:12 [PATCH RESEND v1 0/7] Intel Processor Trace virtulization enabling Luwei Kang
2018-01-15 18:12 ` [PATCH RESEND v1 1/7] x86: add a flag to enable Intel processor trace Luwei Kang
2018-03-09 16:53 ` Wei Liu
2018-03-12 9:25 ` Kang, Luwei
2018-04-26 12:09 ` Wei Liu
2018-04-27 8:22 ` Kang, Luwei
2018-04-27 8:32 ` Wei Liu
2018-04-27 13:03 ` Jan Beulich
2018-04-27 23:16 ` Kang, Luwei [this message]
2018-04-26 12:29 ` Jan Beulich
2018-04-27 9:01 ` Kang, Luwei
2018-04-27 12:15 ` Jan Beulich
2018-04-27 23:18 ` Kang, Luwei
2018-01-15 18:12 ` [PATCH RESEND v1 2/7] x86: configure vmcs for Intel processor trace virtualization Luwei Kang
2018-04-26 12:34 ` Jan Beulich
2018-04-28 1:07 ` Kang, Luwei
2018-04-30 7:42 ` Jan Beulich
2018-05-02 7:22 ` Kang, Luwei
2018-05-02 9:09 ` Jan Beulich
2018-05-02 9:22 ` Kang, Luwei
2018-01-15 18:12 ` [PATCH RESEND v1 3/7] x86: add intel proecessor trace support for cpuid Luwei Kang
2018-04-30 15:43 ` Konrad Rzeszutek Wilk
2018-05-02 7:32 ` Kang, Luwei
2018-01-15 18:12 ` [PATCH RESEND v1 4/7] x86: add intel processor trace context Luwei Kang
2018-04-26 12:11 ` Wei Liu
2018-04-26 12:59 ` Jan Beulich
2018-04-28 1:26 ` Kang, Luwei
2018-01-15 18:12 ` [PATCH RESEND v1 5/7] x86: Implement Intel Processor Trace context switch Luwei Kang
2018-04-26 12:11 ` Wei Liu
2018-04-27 8:53 ` Kang, Luwei
2018-05-02 15:19 ` Wei Liu
2018-05-02 15:43 ` Jan Beulich
2018-05-02 16:15 ` Wei Liu
2018-05-02 16:51 ` Andrew Cooper
2018-05-03 7:27 ` Jan Beulich
2018-05-03 7:26 ` Jan Beulich
2018-05-03 7:51 ` Wei Liu
2018-04-26 13:12 ` Jan Beulich
2018-04-28 2:56 ` Kang, Luwei
2018-01-15 18:12 ` [PATCH RESEND v1 6/7] x86: Implement Intel Processor Trace MSRs read/write Luwei Kang
2018-04-26 13:20 ` Jan Beulich
2018-04-27 12:26 ` Jan Beulich
2018-05-03 5:22 ` Kang, Luwei
2018-05-03 7:33 ` Jan Beulich
2018-05-03 9:40 ` Kang, Luwei
2018-05-03 11:36 ` Jan Beulich
2018-05-04 3:53 ` Kang, Luwei
2018-05-04 12:06 ` Jan Beulich
2018-05-10 9:06 ` Kang, Luwei
2018-01-15 18:12 ` [PATCH RESEND v1 7/7] x86: Disable Intel Processor Trace when VMXON in L1 guest Luwei Kang
2018-01-16 8:41 ` [PATCH RESEND v1 0/7] Intel Processor Trace virtulization enabling Jan Beulich
2018-01-16 9:02 ` Kang, Luwei
2018-01-16 9:30 ` Jan Beulich
2018-01-16 9:45 ` Kang, Luwei
2018-04-26 12:12 ` Wei Liu
2018-05-03 4:06 ` Kang, Luwei
2018-05-03 5:55 ` Razvan Cojocaru
2018-05-03 8:06 ` Wei Liu
2018-05-04 4:10 ` Kang, Luwei
2018-05-03 9:49 ` Kang, Luwei
2018-05-03 10:01 ` Andrew Cooper
2018-05-04 3:08 ` Kang, Luwei
2018-05-10 9:26 ` Kang, Luwei
2018-05-10 9:56 ` Andrew Cooper
2018-05-15 2:50 ` Kang, Luwei
2018-04-30 15:42 ` Konrad Rzeszutek Wilk
2018-05-02 7:27 ` Kang, Luwei
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