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From: "Sharma, Shashank" <shashank.sharma@intel.com>
To: Vidya Srinivas <vidya.srinivas@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc
Date: Wed, 7 Feb 2018 21:22:22 +0530	[thread overview]
Message-ID: <82dbc81e-5fa7-bed9-fc45-b93983789035@intel.com> (raw)
In-Reply-To: <1517921899-25926-4-git-send-email-vidya.srinivas@intel.com>

Regards

Shashank


On 2/6/2018 6:28 PM, Vidya Srinivas wrote:
> From: Mahesh Kumar <mahesh1.kumar@intel.com>
>
> Add support of recognizing DRM_FORMAT_NV12 from plane_format
> register value.
>
> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_display.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 60ba5bb..e3a6a7f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2626,6 +2626,8 @@ static int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
>   	switch (format) {
>   	case PLANE_CTL_FORMAT_RGB_565:
>   		return DRM_FORMAT_RGB565;
> +	case PLANE_CTL_FORMAT_NV12:
> +		return DRM_FORMAT_NV12;
I dont think this is correct, the case PLANE_CTL_FORMAT_NV12 is defined 
as (1 << 24) but when I check bspec definition, 24th bit is set for 
P010/12/16 formats. AFAIK NV12 is 8 bit format whereas P0xx formats are 
10/12/16 bit formats (they both are YCBCR 4:2:0 of course). This means 
we have mixed NV12 format with P0xx formats. When I checked the 
definition of DRM_FORMAT_NV12, I am not sure if that's intended for 
this. Ville, I saw that the DRM_FORMAT_NV12 definition was added by you, 
can you please comment if this is the right usage ?

- Shashank
>   	default:
>   	case PLANE_CTL_FORMAT_XRGB_8888:
>   		if (rgb_order) {

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  reply	other threads:[~2018-02-07 15:52 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-06 12:58 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-06 12:58 ` [PATCH 01/16] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values Vidya Srinivas
2018-02-06 12:58 ` [PATCH] drm/i915/skl+: refactor WM calculation for NV12 Vidya Srinivas
2018-02-06 12:58 ` [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-02-07 15:52   ` Sharma, Shashank [this message]
2018-02-08  3:20     ` Srinivas, Vidya
2018-02-08  4:32       ` Sharma, Shashank
2018-02-08  6:47         ` Sharma, Shashank
2018-02-09  3:50           ` Srinivas, Vidya
2018-02-15 11:30           ` Srinivas, Vidya
2018-02-06 12:58 ` [PATCH 04/16] drm/i915/skl+: support verification of DDB HW state for NV12 Vidya Srinivas
2018-02-07 16:21   ` Sharma, Shashank
2018-02-06 12:58 ` [PATCH 05/16] drm/i915/skl+: NV12 related changes for WM Vidya Srinivas
2018-02-07 16:42   ` Sharma, Shashank
2018-02-13  8:31     ` Kumar, Mahesh
2018-02-06 12:58 ` [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-02-07 16:46   ` Sharma, Shashank
2018-02-06 12:58 ` [PATCH 07/16] drm/i915/skl+: make sure higher latency level has higher wm value Vidya Srinivas
2018-02-08  8:27   ` Sharma, Shashank
2018-02-06 12:58 ` [PATCH 08/16] drm/i915/skl+: nv12 workaround disable WM level 1-7 Vidya Srinivas
2018-02-08  8:31   ` Sharma, Shashank
2018-02-08  8:42     ` Kumar, Mahesh
2018-02-06 12:58 ` [PATCH 09/16] drm/i915/skl: split skl_compute_ddb function Vidya Srinivas
2018-02-06 12:58 ` [PATCH 10/16] drm/i915: Set scaler mode for NV12 Vidya Srinivas
2018-02-08  9:04   ` Sharma, Shashank
2018-02-09  3:47     ` Srinivas, Vidya
2018-02-06 12:58 ` [PATCH 11/16] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas
2018-02-08  9:15   ` Sharma, Shashank
2018-02-06 12:58 ` [PATCH 12/16] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas
2018-02-08  9:45   ` Sharma, Shashank
2018-02-09  3:45     ` Srinivas, Vidya
2018-02-12  8:31     ` Srinivas, Vidya
2018-02-06 12:58 ` [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas
2018-02-08 10:47   ` Sharma, Shashank
2018-02-06 12:58 ` [PATCH 14/16] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
2018-02-08 10:51   ` Sharma, Shashank
2018-02-09  3:37     ` Srinivas, Vidya
2018-02-06 12:58 ` [PATCH 15/16] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas
2018-02-08 10:53   ` Sharma, Shashank
2018-02-06 12:58 ` [PATCH 16/16] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg Vidya Srinivas
2018-02-08 12:09   ` Sharma, Shashank
  -- strict thread matches above, loose matches on Subject: below --
2018-02-21 10:20 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-21 10:20 ` [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-02-15  2:39 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-15  2:39 ` [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-02-14  4:57 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-14  4:57 ` [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-02-13  9:51 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-13  9:52 ` [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-02-13 10:35   ` Mika Kahola
2018-02-21  3:10     ` Srinivas, Vidya
2018-02-06 13:02 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-06 13:02 ` [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-01-22 12:03 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-01-22 12:03 ` [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-01-23 13:23   ` Mika Kahola

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