* [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
@ 2019-05-14 10:59 Tiecheng Zhou
[not found] ` <1557831559-6925-1-git-send-email-Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Tiecheng Zhou @ 2019-05-14 10:59 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Tiecheng Zhou, Emily Deng
it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
using the value left by a previous VM under sriov scenario.
v2: it should not hurt baremetal, generalize it for both sriov
and baremetal
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index be729e7..c221570 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1181,6 +1181,9 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
+
/* After HDP is initialized, flush HDP.*/
adev->nbio_funcs->hdp_flush(adev, NULL);
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
[not found] ` <1557831559-6925-1-git-send-email-Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
@ 2019-05-14 11:04 ` Christian König
0 siblings, 0 replies; 7+ messages in thread
From: Christian König @ 2019-05-14 11:04 UTC (permalink / raw)
To: Tiecheng Zhou, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Emily Deng
Am 14.05.19 um 12:59 schrieb Tiecheng Zhou:
> it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
> using the value left by a previous VM under sriov scenario.
>
> v2: it should not hurt baremetal, generalize it for both sriov
> and baremetal
>
> Signed-off-by: Emily Deng <Emily.Deng@amd.com>
> Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index be729e7..c221570 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1181,6 +1181,9 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
> tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
> WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
>
> + WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
> + WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
> +
> /* After HDP is initialized, flush HDP.*/
> adev->nbio_funcs->hdp_flush(adev, NULL);
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
[not found] ` <8cca3031-e258-785c-331c-6c6d32421ed0-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
@ 2019-05-14 14:17 ` Deucher, Alexander
0 siblings, 0 replies; 7+ messages in thread
From: Deucher, Alexander @ 2019-05-14 14:17 UTC (permalink / raw)
To: Koenig, Christian, Zhou, Tiecheng,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Deng, Emily
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Christian König
> Sent: Tuesday, May 14, 2019 6:34 AM
> To: Zhou, Tiecheng <Tiecheng.Zhou@amd.com>; amd-
> gfx@lists.freedesktop.org
> Cc: Deng, Emily <Emily.Deng@amd.com>
> Subject: Re: [PATCH] drm/amdgpu/sriov: Need to initialize the
> HDP_NONSURFACE_BAStE
>
> [CAUTION: External Email]
>
> Am 14.05.19 um 12:24 schrieb Tiecheng Zhou:
> > it requires to initialize HDP_NONSURFACE_BASE, so as to avoid using
> > the value left by a previous VM under sriov scenario.
> >
> > Signed-off-by: Emily Deng <Emily.Deng@amd.com>
> > Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
>
> Would it hurt us to also do this on bare metal?
>
Vbios Asic_init handles this for us on bare metal.
Alex
> Apart from that looks good to me,
> Christian.
>
> > ---
> > drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > index be729e7..e96684e 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > @@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct
> amdgpu_device *adev)
> > tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
> > WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
> >
> > + if (amdgpu_sriov_vf(adev)) {
> > + WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev-
> >gmc.vram_start >> 8));
> > + WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev-
> >gmc.vram_start >> 40));
> > + }
> > +
> > /* After HDP is initialized, flush HDP.*/
> > adev->nbio_funcs->hdp_flush(adev, NULL);
> >
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
[not found] ` <1557804896-4032-1-git-send-email-Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
@ 2019-05-14 14:06 ` Deucher, Alexander
0 siblings, 0 replies; 7+ messages in thread
From: Deucher, Alexander @ 2019-05-14 14:06 UTC (permalink / raw)
To: Zhou, Tiecheng, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Deng, Emily
[-- Attachment #1.1: Type: text/plain, Size: 1826 bytes --]
Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
________________________________
From: amd-gfx <amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Tiecheng Zhou <Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
Sent: Monday, May 13, 2019 11:34 PM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Zhou, Tiecheng; Deng, Emily
Subject: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
[CAUTION: External Email]
it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
using the value left by a previous VM under sriov scenario.
Signed-off-by: Emily Deng <Emily.Deng-5C7GfCeVMHo@public.gmane.org>
Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index be729e7..e96684e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
+ if (amdgpu_sriov_vf(adev)) {
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
+ }
+
/* After HDP is initialized, flush HDP.*/
adev->nbio_funcs->hdp_flush(adev, NULL);
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[-- Attachment #1.2: Type: text/html, Size: 3206 bytes --]
[-- Attachment #2: Type: text/plain, Size: 153 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
[not found] ` <1557829492-5991-1-git-send-email-Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
@ 2019-05-14 10:33 ` Christian König
[not found] ` <8cca3031-e258-785c-331c-6c6d32421ed0-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Christian König @ 2019-05-14 10:33 UTC (permalink / raw)
To: Tiecheng Zhou, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Emily Deng
Am 14.05.19 um 12:24 schrieb Tiecheng Zhou:
> it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
> using the value left by a previous VM under sriov scenario.
>
> Signed-off-by: Emily Deng <Emily.Deng@amd.com>
> Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
Would it hurt us to also do this on bare metal?
Apart from that looks good to me,
Christian.
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index be729e7..e96684e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
> tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
> WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
>
> + if (amdgpu_sriov_vf(adev)) {
> + WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
> + WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
> + }
> +
> /* After HDP is initialized, flush HDP.*/
> adev->nbio_funcs->hdp_flush(adev, NULL);
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
@ 2019-05-14 10:24 Tiecheng Zhou
[not found] ` <1557829492-5991-1-git-send-email-Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Tiecheng Zhou @ 2019-05-14 10:24 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Tiecheng Zhou, Emily Deng
it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
using the value left by a previous VM under sriov scenario.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index be729e7..e96684e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
+ if (amdgpu_sriov_vf(adev)) {
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
+ }
+
/* After HDP is initialized, flush HDP.*/
adev->nbio_funcs->hdp_flush(adev, NULL);
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
@ 2019-05-14 3:34 Tiecheng Zhou
[not found] ` <1557804896-4032-1-git-send-email-Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Tiecheng Zhou @ 2019-05-14 3:34 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Tiecheng Zhou, Emily Deng
it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
using the value left by a previous VM under sriov scenario.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou@amd.com>
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index be729e7..e96684e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1181,6 +1181,11 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
+ if (amdgpu_sriov_vf(adev)) {
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
+ }
+
/* After HDP is initialized, flush HDP.*/
adev->nbio_funcs->hdp_flush(adev, NULL);
--
2.7.4
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
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2019-05-14 10:59 [PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE Tiecheng Zhou
[not found] ` <1557831559-6925-1-git-send-email-Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
2019-05-14 11:04 ` Christian König
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2019-05-14 10:24 Tiecheng Zhou
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2019-05-14 10:33 ` Christian König
[not found] ` <8cca3031-e258-785c-331c-6c6d32421ed0-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-05-14 14:17 ` Deucher, Alexander
2019-05-14 3:34 Tiecheng Zhou
[not found] ` <1557804896-4032-1-git-send-email-Tiecheng.Zhou-5C7GfCeVMHo@public.gmane.org>
2019-05-14 14:06 ` Deucher, Alexander
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