Re: [Intel-gfx] [PATCH v2 5/6] drm/i915/uc: Move uC debugfs to its own folder under GT

[Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>]

On 3/11/20 6:16 PM, Daniele Ceraolo Spurio wrote:
> uC is a component of the GT, so it makes sense for the uC debugfs files
> to be in the GT folder. A subfolder has been used to keep the same
> structure we have for the code.
> 
> v2: use intel_* prefix (Jani), rebase on new gt_debugfs_register_files,
>      fix permissions for writable debugfs files.
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Andi Shyti <andi.shyti@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Tony Ye <tony.ye@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/Makefile                |   7 +-
>   drivers/gpu/drm/i915/gt/debugfs_gt.c         |   6 +-
>   drivers/gpu/drm/i915/gt/uc/debugfs_guc.c     |  42 ++++++
>   drivers/gpu/drm/i915/gt/uc/debugfs_guc.h     |  14 ++
>   drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.c | 124 +++++++++++++++++
>   drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.h |  15 ++
>   drivers/gpu/drm/i915/gt/uc/debugfs_huc.c     |  36 +++++
>   drivers/gpu/drm/i915/gt/uc/debugfs_huc.h     |  14 ++
>   drivers/gpu/drm/i915/gt/uc/debugfs_uc.c      |  31 +++++
>   drivers/gpu/drm/i915/gt/uc/debugfs_uc.h      |  14 ++
>   drivers/gpu/drm/i915/gt/uc/intel_guc.h       |   5 +
>   drivers/gpu/drm/i915/gt/uc/intel_guc_log.c   |   5 -
>   drivers/gpu/drm/i915/i915_debugfs.c          | 137 -------------------
>   13 files changed, 306 insertions(+), 144 deletions(-)
>   create mode 100644 drivers/gpu/drm/i915/gt/uc/debugfs_guc.c
>   create mode 100644 drivers/gpu/drm/i915/gt/uc/debugfs_guc.h
>   create mode 100644 drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.c
>   create mode 100644 drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.h
>   create mode 100644 drivers/gpu/drm/i915/gt/uc/debugfs_huc.c
>   create mode 100644 drivers/gpu/drm/i915/gt/uc/debugfs_huc.h
>   create mode 100644 drivers/gpu/drm/i915/gt/uc/debugfs_uc.c
>   create mode 100644 drivers/gpu/drm/i915/gt/uc/debugfs_uc.h
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 9f887a86e555..f862ac6615d8 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -166,7 +166,12 @@ i915-y += \
>   	  intel_wopcm.o
>   
>   # general-purpose microcontroller (GuC) support
> -i915-y += gt/uc/intel_uc.o \
> +i915-y += \
> +	  gt/uc/debugfs_guc.o \
> +	  gt/uc/debugfs_guc_log.o \
> +	  gt/uc/debugfs_huc.o \
> +	  gt/uc/debugfs_uc.o \

In an IM discussion Michal suggested to rename those files to 
intel_uc_debugfs, intel_guc_debugfs etc. This would be different from 
the files under gt/. Before I do it, does anyone have a problem with the 
renaming?

Daniele

> +	  gt/uc/intel_uc.o \
>   	  gt/uc/intel_uc_fw.o \
>   	  gt/uc/intel_guc.o \
>   	  gt/uc/intel_guc_ads.o \
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c b/drivers/gpu/drm/i915/gt/debugfs_gt.c
> index de73b63d6ba7..fcbc57e226c3 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
> +++ b/drivers/gpu/drm/i915/gt/debugfs_gt.c
> @@ -9,6 +9,7 @@
>   #include "debugfs_engines.h"
>   #include "debugfs_gt.h"
>   #include "debugfs_gt_pm.h"
> +#include "uc/debugfs_uc.h"
>   #include "i915_drv.h"
>   
>   void debugfs_gt_register(struct intel_gt *gt)
> @@ -24,6 +25,8 @@ void debugfs_gt_register(struct intel_gt *gt)
>   
>   	debugfs_engines_register(gt, root);
>   	debugfs_gt_pm_register(gt, root);
> +
> +	intel_uc_debugfs_register(&gt->uc, root);
>   }
>   
>   void intel_gt_debugfs_register_files(struct dentry *root,
> @@ -31,9 +34,10 @@ void intel_gt_debugfs_register_files(struct dentry *root,
>   				     unsigned long count, void *data)
>   {
>   	while (count--) {
> +		umode_t mode = files->fops->write ? 0644 : 0444;
>   		if (!files->eval || files->eval(data))
>   			debugfs_create_file(files->name,
> -					    0444, root, data,
> +					    mode, root, data,
>   					    files->fops);
>   
>   		files++;
> diff --git a/drivers/gpu/drm/i915/gt/uc/debugfs_guc.c b/drivers/gpu/drm/i915/gt/uc/debugfs_guc.c
> new file mode 100644
> index 000000000000..4506b52a61f2
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/uc/debugfs_guc.c
> @@ -0,0 +1,42 @@
> +// SPDX-License-Identifier: MIT
> +
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +#include <drm/drm_print.h>
> +
> +#include "gt/debugfs_gt.h"
> +#include "debugfs_guc_log.h"
> +#include "intel_guc.h"
> +
> +static int guc_info_show(struct seq_file *m, void *data)
> +{
> +	struct intel_guc *guc = m->private;
> +	struct drm_printer p = drm_seq_file_printer(m);
> +
> +	if (!intel_guc_is_supported(guc))
> +		return -ENODEV;
> +
> +	intel_guc_load_status(guc, &p);
> +	drm_puts(&p, "\n");
> +	intel_guc_log_info(&guc->log, &p);
> +
> +	/* Add more as required ... */
> +
> +	return 0;
> +}
> +DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_info);
> +
> +void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
> +{
> +	static const struct debugfs_gt_file files[] = {
> +		{ "guc_info", &guc_info_fops, NULL },
> +	};
> +
> +	if (!intel_guc_is_supported(guc))
> +		return;
> +
> +	intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), guc);
> +	intel_guc_log_debugfs_register(&guc->log, root);
> +}
> diff --git a/drivers/gpu/drm/i915/gt/uc/debugfs_guc.h b/drivers/gpu/drm/i915/gt/uc/debugfs_guc.h
> new file mode 100644
> index 000000000000..424c26665cf1
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/uc/debugfs_guc.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +#ifndef DEBUGFS_GUC_H
> +#define DEBUGFS_GUC_H
> +
> +struct intel_guc;
> +struct dentry;
> +
> +void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root);
> +
> +#endif /* DEBUGFS_GUC_H */
> diff --git a/drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.c b/drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.c
> new file mode 100644
> index 000000000000..8bc2922915f4
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.c
> @@ -0,0 +1,124 @@
> +// SPDX-License-Identifier: MIT
> +
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +#include <linux/fs.h>
> +#include <drm/drm_print.h>
> +
> +#include "gt/debugfs_gt.h"
> +#include "intel_guc.h"
> +#include "intel_guc_log.h"
> +
> +static int guc_log_dump_show(struct seq_file *m, void *data)
> +{
> +	struct drm_printer p = drm_seq_file_printer(m);
> +
> +	return intel_guc_log_dump(m->private, &p, false);
> +}
> +DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_log_dump);
> +
> +static int guc_load_err_log_dump_show(struct seq_file *m, void *data)
> +{
> +	struct drm_printer p = drm_seq_file_printer(m);
> +
> +	return intel_guc_log_dump(m->private, &p, true);
> +}
> +DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_load_err_log_dump);
> +
> +static int guc_log_level_get(void *data, u64 *val)
> +{
> +	struct intel_guc_log *log = data;
> +
> +	if (!intel_guc_is_used(log_to_guc(log)))
> +		return -ENODEV;
> +
> +	*val = intel_guc_log_get_level(log);
> +
> +	return 0;
> +}
> +
> +static int guc_log_level_set(void *data, u64 val)
> +{
> +	struct intel_guc_log *log = data;
> +
> +	if (!intel_guc_is_used(log_to_guc(log)))
> +		return -ENODEV;
> +
> +	return intel_guc_log_set_level(log, val);
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(guc_log_level_fops,
> +			guc_log_level_get, guc_log_level_set,
> +			"%lld\n");
> +
> +static int guc_log_relay_open(struct inode *inode, struct file *file)
> +{
> +	struct intel_guc_log *log = inode->i_private;
> +
> +	if (!intel_guc_is_ready(log_to_guc(log)))
> +		return -ENODEV;
> +
> +	file->private_data = log;
> +
> +	return intel_guc_log_relay_open(log);
> +}
> +
> +static ssize_t
> +guc_log_relay_write(struct file *filp,
> +		    const char __user *ubuf,
> +		    size_t cnt,
> +		    loff_t *ppos)
> +{
> +	struct intel_guc_log *log = filp->private_data;
> +	int val;
> +	int ret;
> +
> +	ret = kstrtoint_from_user(ubuf, cnt, 0, &val);
> +	if (ret < 0)
> +		return ret;
> +
> +	/*
> +	 * Enable and start the guc log relay on value of 1.
> +	 * Flush log relay for any other value.
> +	 */
> +	if (val == 1)
> +		ret = intel_guc_log_relay_start(log);
> +	else
> +		intel_guc_log_relay_flush(log);
> +
> +	return ret ?: cnt;
> +}
> +
> +static int guc_log_relay_release(struct inode *inode, struct file *file)
> +{
> +	struct intel_guc_log *log = inode->i_private;
> +
> +	intel_guc_log_relay_close(log);
> +	return 0;
> +}
> +
> +static const struct file_operations guc_log_relay_fops = {
> +	.owner = THIS_MODULE,
> +	.open = guc_log_relay_open,
> +	.write = guc_log_relay_write,
> +	.release = guc_log_relay_release,
> +};
> +
> +void intel_guc_log_debugfs_register(struct intel_guc_log *log,
> +				    struct dentry *root)
> +{
> +	static const struct debugfs_gt_file files[] = {
> +		{ "guc_log_dump", &guc_log_dump_fops, NULL },
> +		{ "guc_load_err_log_dump", &guc_load_err_log_dump_fops, NULL },
> +		{ "guc_log_level", &guc_log_level_fops, NULL },
> +		{ "guc_log_relay", &guc_log_relay_fops, NULL },
> +	};
> +
> +	if (!intel_guc_is_supported(log_to_guc(log)))
> +		return;
> +
> +	intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), log);
> +}
> +
> diff --git a/drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.h b/drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.h
> new file mode 100644
> index 000000000000..e8900e3d74ea
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/uc/debugfs_guc_log.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +#ifndef DEBUGFS_GUC_LOG_H
> +#define DEBUGFS_GUC_LOG_H
> +
> +struct intel_guc_log;
> +struct dentry;
> +
> +void intel_guc_log_debugfs_register(struct intel_guc_log *log,
> +				    struct dentry *root);
> +
> +#endif /* DEBUGFS_GUC_LOG_H */
> diff --git a/drivers/gpu/drm/i915/gt/uc/debugfs_huc.c b/drivers/gpu/drm/i915/gt/uc/debugfs_huc.c
> new file mode 100644
> index 000000000000..497e4c693f83
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/uc/debugfs_huc.c
> @@ -0,0 +1,36 @@
> +// SPDX-License-Identifier: MIT
> +
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +#include <drm/drm_print.h>
> +
> +#include "gt/debugfs_gt.h"
> +#include "intel_huc.h"
> +
> +static int huc_info_show(struct seq_file *m, void *data)
> +{
> +	struct intel_huc *huc = m->private;
> +	struct drm_printer p = drm_seq_file_printer(m);
> +
> +	if (!intel_huc_is_supported(huc))
> +		return -ENODEV;
> +
> +	intel_huc_load_status(huc, &p);
> +
> +	return 0;
> +}
> +DEFINE_GT_DEBUGFS_ATTRIBUTE(huc_info);
> +
> +void intel_huc_debugfs_register(struct intel_huc *huc, struct dentry *root)
> +{
> +	static const struct debugfs_gt_file files[] = {
> +		{ "huc_info", &huc_info_fops, NULL },
> +	};
> +
> +	if (!intel_huc_is_supported(huc))
> +		return;
> +
> +	intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), huc);
> +}
> diff --git a/drivers/gpu/drm/i915/gt/uc/debugfs_huc.h b/drivers/gpu/drm/i915/gt/uc/debugfs_huc.h
> new file mode 100644
> index 000000000000..be79e992f976
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/uc/debugfs_huc.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +#ifndef DEBUGFS_HUC_H
> +#define DEBUGFS_HUC_H
> +
> +struct intel_huc;
> +struct dentry;
> +
> +void intel_huc_debugfs_register(struct intel_huc *huc, struct dentry *root);
> +
> +#endif /* DEBUGFS_HUC_H */
> diff --git a/drivers/gpu/drm/i915/gt/uc/debugfs_uc.c b/drivers/gpu/drm/i915/gt/uc/debugfs_uc.c
> new file mode 100644
> index 000000000000..fd18347f8d1c
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/uc/debugfs_uc.c
> @@ -0,0 +1,31 @@
> +// SPDX-License-Identifier: MIT
> +
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +#include <linux/debugfs.h>
> +
> +#include "debugfs_guc.h"
> +#include "debugfs_huc.h"
> +#include "debugfs_uc.h"
> +#include "intel_uc.h"
> +
> +void intel_uc_debugfs_register(struct intel_uc *uc, struct dentry *gt_root)
> +{
> +	struct dentry *root;
> +
> +	if (!gt_root)
> +		return;
> +
> +	/* GuC and HuC go always in pair, no need to check both */
> +	if (!intel_uc_supports_guc(uc))
> +		return;
> +
> +	root = debugfs_create_dir("uc", gt_root);
> +	if (IS_ERR(root))
> +		return;
> +
> +	intel_guc_debugfs_register(&uc->guc, root);
> +	intel_huc_debugfs_register(&uc->huc, root);
> +}
> diff --git a/drivers/gpu/drm/i915/gt/uc/debugfs_uc.h b/drivers/gpu/drm/i915/gt/uc/debugfs_uc.h
> new file mode 100644
> index 000000000000..010ce250d223
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/uc/debugfs_uc.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2020 Intel Corporation
> + */
> +
> +#ifndef DEBUGFS_UC_H
> +#define DEBUGFS_UC_H
> +
> +struct intel_uc;
> +struct dentry;
> +
> +void intel_uc_debugfs_register(struct intel_uc *uc, struct dentry *gt_root);
> +
> +#endif /* DEBUGFS_UC_H */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index a5d7a86be4cf..e84ab67b317d 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -74,6 +74,11 @@ struct intel_guc {
>   	struct mutex send_mutex;
>   };
>   
> +static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
> +{
> +	return container_of(log, struct intel_guc, log);
> +}
> +
>   static
>   inline int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len)
>   {
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> index 8cdd6dc3df58..5b11a6d8e27f 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> @@ -55,11 +55,6 @@ static int guc_action_control_log(struct intel_guc *guc, bool enable,
>   	return intel_guc_send(guc, action, ARRAY_SIZE(action));
>   }
>   
> -static inline struct intel_guc *log_to_guc(struct intel_guc_log *log)
> -{
> -	return container_of(log, struct intel_guc, log);
> -}
> -
>   static void guc_log_enable_flush_events(struct intel_guc_log *log)
>   {
>   	intel_guc_enable_msg(log_to_guc(log),
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 56504be2a6ec..e60a5750ea44 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -37,7 +37,6 @@
>   #include "gt/intel_reset.h"
>   #include "gt/intel_rc6.h"
>   #include "gt/intel_rps.h"
> -#include "gt/uc/intel_guc_submission.h"
>   
>   #include "i915_debugfs.h"
>   #include "i915_debugfs_params.h"
> @@ -1251,136 +1250,6 @@ static int i915_llc(struct seq_file *m, void *data)
>   	return 0;
>   }
>   
> -static int i915_huc_info(struct seq_file *m, void *data)
> -{
> -	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> -	struct intel_huc *huc = &dev_priv->gt.uc.huc;
> -	struct drm_printer p = drm_seq_file_printer(m);
> -
> -	if (!intel_huc_is_supported(huc))
> -		return -ENODEV;
> -
> -	intel_huc_load_status(huc, &p);
> -
> -	return 0;
> -}
> -
> -static int i915_guc_info(struct seq_file *m, void *data)
> -{
> -	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> -	struct intel_guc *guc = &dev_priv->gt.uc.guc;
> -	struct drm_printer p = drm_seq_file_printer(m);
> -
> -	if (!intel_guc_is_supported(guc))
> -		return -ENODEV;
> -
> -	intel_guc_load_status(guc, &p);
> -	drm_puts(&p, "\n");
> -	intel_guc_log_info(&guc->log, &p);
> -
> -	/* Add more as required ... */
> -
> -	return 0;
> -}
> -
> -static int i915_guc_log_dump(struct seq_file *m, void *data)
> -{
> -	struct drm_info_node *node = m->private;
> -	struct drm_i915_private *dev_priv = node_to_i915(node);
> -	struct intel_guc *guc = &dev_priv->gt.uc.guc;
> -	bool dump_load_err = !!node->info_ent->data;
> -	struct drm_printer p = drm_seq_file_printer(m);
> -
> -	if (!intel_guc_is_supported(guc))
> -		return -ENODEV;
> -
> -	return intel_guc_log_dump(&guc->log, &p, dump_load_err);
> -}
> -
> -static int i915_guc_log_level_get(void *data, u64 *val)
> -{
> -	struct drm_i915_private *dev_priv = data;
> -	struct intel_uc *uc = &dev_priv->gt.uc;
> -
> -	if (!intel_uc_uses_guc(uc))
> -		return -ENODEV;
> -
> -	*val = intel_guc_log_get_level(&uc->guc.log);
> -
> -	return 0;
> -}
> -
> -static int i915_guc_log_level_set(void *data, u64 val)
> -{
> -	struct drm_i915_private *dev_priv = data;
> -	struct intel_uc *uc = &dev_priv->gt.uc;
> -
> -	if (!intel_uc_uses_guc(uc))
> -		return -ENODEV;
> -
> -	return intel_guc_log_set_level(&uc->guc.log, val);
> -}
> -
> -DEFINE_SIMPLE_ATTRIBUTE(i915_guc_log_level_fops,
> -			i915_guc_log_level_get, i915_guc_log_level_set,
> -			"%lld\n");
> -
> -static int i915_guc_log_relay_open(struct inode *inode, struct file *file)
> -{
> -	struct drm_i915_private *i915 = inode->i_private;
> -	struct intel_guc *guc = &i915->gt.uc.guc;
> -	struct intel_guc_log *log = &guc->log;
> -
> -	if (!intel_guc_is_ready(guc))
> -		return -ENODEV;
> -
> -	file->private_data = log;
> -
> -	return intel_guc_log_relay_open(log);
> -}
> -
> -static ssize_t
> -i915_guc_log_relay_write(struct file *filp,
> -			 const char __user *ubuf,
> -			 size_t cnt,
> -			 loff_t *ppos)
> -{
> -	struct intel_guc_log *log = filp->private_data;
> -	int val;
> -	int ret;
> -
> -	ret = kstrtoint_from_user(ubuf, cnt, 0, &val);
> -	if (ret < 0)
> -		return ret;
> -
> -	/*
> -	 * Enable and start the guc log relay on value of 1.
> -	 * Flush log relay for any other value.
> -	 */
> -	if (val == 1)
> -		ret = intel_guc_log_relay_start(log);
> -	else
> -		intel_guc_log_relay_flush(log);
> -
> -	return ret ?: cnt;
> -}
> -
> -static int i915_guc_log_relay_release(struct inode *inode, struct file *file)
> -{
> -	struct drm_i915_private *i915 = inode->i_private;
> -	struct intel_guc *guc = &i915->gt.uc.guc;
> -
> -	intel_guc_log_relay_close(&guc->log);
> -	return 0;
> -}
> -
> -static const struct file_operations i915_guc_log_relay_fops = {
> -	.owner = THIS_MODULE,
> -	.open = i915_guc_log_relay_open,
> -	.write = i915_guc_log_relay_write,
> -	.release = i915_guc_log_relay_release,
> -};
> -
>   static int i915_runtime_pm_status(struct seq_file *m, void *unused)
>   {
>   	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> @@ -1989,10 +1858,6 @@ static const struct drm_info_list i915_debugfs_list[] = {
>   	{"i915_gem_objects", i915_gem_object_info, 0},
>   	{"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
>   	{"i915_gem_interrupt", i915_interrupt_info, 0},
> -	{"i915_guc_info", i915_guc_info, 0},
> -	{"i915_guc_log_dump", i915_guc_log_dump, 0},
> -	{"i915_guc_load_err_log_dump", i915_guc_log_dump, 0, (void *)1},
> -	{"i915_huc_info", i915_huc_info, 0},
>   	{"i915_frequency_info", i915_frequency_info, 0},
>   	{"i915_ring_freq_table", i915_ring_freq_table, 0},
>   	{"i915_context_status", i915_context_status, 0},
> @@ -2020,8 +1885,6 @@ static const struct i915_debugfs_files {
>   	{"i915_error_state", &i915_error_state_fops},
>   	{"i915_gpu_info", &i915_gpu_info_fops},
>   #endif
> -	{"i915_guc_log_level", &i915_guc_log_level_fops},
> -	{"i915_guc_log_relay", &i915_guc_log_relay_fops},
>   };
>   
>   int i915_debugfs_register(struct drm_i915_private *dev_priv)
> 
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