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Thu, 14 Jan 2021 06:10:49 -0500 (EST) Subject: Re: logical PIO code for mips question (was Re: [PATCH RESEND v3 3/3] MIPS: Loongson64: Enable PCI_IO_VMMAP) To: John Garry , linux-mips@vger.kernel.org Cc: chenhc@lemote.com, tsbogend@alpha.franken.de References: <20200426114806.1176629-1-jiaxun.yang@flygoat.com> <20200508114438.3092215-1-jiaxun.yang@flygoat.com> <20200508114438.3092215-3-jiaxun.yang@flygoat.com> <1a21eaf7-52c0-c032-4405-1b6916628ade@huawei.com> <05b37da0-aabd-941f-6fff-47c3b46c95d2@flygoat.com> <797e574a-e4fe-df6c-f352-6a5a239c32de@huawei.com> From: Jiaxun Yang Message-ID: <83748d12-eee2-686a-e12d-2abf19aeccd0@flygoat.com> Date: Thu, 14 Jan 2021 19:10:44 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.1 MIME-Version: 1.0 In-Reply-To: <797e574a-e4fe-df6c-f352-6a5a239c32de@huawei.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org 在 2021/1/14 下午5:18, John Garry 写道: > On 14/01/2021 00:13, Jiaxun Yang wrote: >>>> range->fwnode = &of_root->fwnode; >>>> +    range->size = MMIO_LOWER_RESERVED; >>>> +    range->hw_start = LOONGSON_PCIIO_BASE; >>>> +    range->flags = LOGIC_PIO_CPU_MMIO; >>>> + >>>> +    if (logic_pio_register_range(range)) { >>>> +        pr_err("Failed to reserve PIO range for legacy ISA\n"); >>>> +        goto free_range; >>>> +    } >>> >>> Hi Jiaxun, >>> >>>> + >>>> +    if (WARN(range->io_start != 0, >>>> +            "Reserved PIO range does not start from 0\n")) >>> >>> Do the mips code still rely on this check? > > > Hi Jiaxun, > >> >> Yes :-/ > > ok, but I was hoping that this dependency would be removed at some stage. > >> >>> >>> I was considering changing the logical PIO code to reserve the first >>> 64K of PCI MMIO space, but making that change would break this code >>> as things stand. >>> >>> The motivation is that some drivers, like [0], access IO ports >>> unconditionally and can kill systems when no PCI host exists. By >>> reserving the first 64K, accesses by those drivers could nullified. >> >> Actually we're trying to deal with almost the same problem. >> The reserved region on MIPS is used to serve these driver that access >> I/O ports bypassing resource subsystem. > > Yes, so reserving the first 64K of IO space would break mips, as > things stand. Has any work been done for these drivers that bypass > resource subsystem (or directly access hardcoded IO ports)? Not yet. > > I may just do this (reserve 64K) under INDIRECT_PIO for now, not sure > yet. Probably we can make the first page of LOGIC_PIO a special region. It could be a reserved region when no legacy ISA bus present or overlay by MMIO in case like MIPS here. Thanks. - Jiaxun > > Thanks, > John