From: Richard Henderson <email@example.com> To: Peter Maydell <firstname.lastname@example.org> Cc: qemu-arm <email@example.com>, QEMU Developers <firstname.lastname@example.org> Subject: Re: [PATCH v2 4/8] linux-user/arm: Report SIGBUS and SIGSEGV correctly Date: Wed, 8 Sep 2021 11:19:13 +0200 [thread overview] Message-ID: <email@example.com> (raw) In-Reply-To: <CAFEAcA82iZptWmCcgonZvLTU4g+5nnEEQDdtHD5y=X7m82N1Yg@mail.gmail.com> On 8/26/21 3:31 PM, Peter Maydell wrote: > Side note: for cases like this where we can tell MAPERR from > ACCERR based on info the exception handler passes to us, should > we prefer that or the "check the page flags" approach that > force_sigsegv_for_addr() takes ? I feel like the former is > nicer, because in a multithreaded program some other thread > might have changed whether the page is mapped between our taking > the fault and getting here. But maybe that's always racy... Both ways are racy. After having played with SIGBUS, what I believe should happen is that we clean up the signal handling such that we can pass through the host MAPERR/ACCERR, remapping any fault address, after filtering the write-protect case that we care about. I'm not sure how much effort it would be to do that. Certainly the test matrix is pretty darn large. But perhaps it would simplify the huge SIGBUS patch set, and thus make it all worthwhile. r~
next prev parent reply other threads:[~2021-09-08 9:20 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-08-21 19:59 [PATCH v2 0/8] target/arm: Fix insn exception priorities Richard Henderson 2021-08-21 19:59 ` [PATCH v2 1/8] target/arm: Take an exception if PSTATE.IL is set Richard Henderson 2021-08-21 19:59 ` [PATCH v2 2/8] target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn Richard Henderson 2021-08-21 19:59 ` [PATCH v2 3/8] linux-user/aarch64: Handle EC_PCALIGNMENT Richard Henderson 2021-08-26 13:27 ` Peter Maydell 2021-08-21 19:59 ` [PATCH v2 4/8] linux-user/arm: Report SIGBUS and SIGSEGV correctly Richard Henderson 2021-08-26 13:31 ` Peter Maydell 2021-09-08 9:19 ` Richard Henderson [this message] 2021-09-19 22:23 ` Richard Henderson 2021-08-21 19:59 ` [PATCH v2 5/8] target/arm: Take an exception if PC is misaligned Richard Henderson 2021-08-26 13:45 ` Peter Maydell 2021-09-20 1:29 ` Richard Henderson 2021-09-20 8:08 ` Peter Maydell 2021-09-20 13:29 ` Richard Henderson 2021-08-21 19:59 ` [PATCH v2 6/8] target/arm: Assert thumb pc is aligned Richard Henderson 2021-08-21 20:46 ` Philippe Mathieu-Daudé 2021-09-19 22:34 ` Richard Henderson 2021-08-26 13:46 ` Peter Maydell 2021-08-21 19:59 ` [PATCH v2 7/8] target/arm: Suppress bp for exceptions with more priority Richard Henderson 2021-08-21 19:59 ` [PATCH v2 8/8] tests/tcg: Add arm and aarch64 pc alignment tests Richard Henderson 2021-08-26 13:54 ` Peter Maydell 2021-08-28 4:04 ` Richard Henderson 2021-09-13 13:29 ` [PATCH v2 0/8] target/arm: Fix insn exception priorities Peter Maydell
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --firstname.lastname@example.org \ --email@example.com \ --firstname.lastname@example.org \ --email@example.com \ --firstname.lastname@example.org \ --subject='Re: [PATCH v2 4/8] linux-user/arm: Report SIGBUS and SIGSEGV correctly' \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.