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From: "Thomas Hellström (Intel)" <thomas_os@shipmail.org>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v4 15/61] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v4.
Date: Mon, 19 Oct 2020 09:30:20 +0200	[thread overview]
Message-ID: <844623d6-389f-d734-b149-2593dd923ca4@shipmail.org> (raw)
In-Reply-To: <20201016104444.1492028-16-maarten.lankhorst@linux.intel.com>


On 10/16/20 12:43 PM, Maarten Lankhorst wrote:
> Instead of doing what we do currently, which will never work with
> PROVE_LOCKING, do the same as AMD does, and something similar to
> relocation slowpath. When all locks are dropped, we acquire the
> pages for pinning. When the locks are taken, we transfer those
> pages in .get_pages() to the bo. As a final check before installing
> the fences, we ensure that the mmu notifier was not called; if it is,
> we return -EAGAIN to userspace to signal it has to start over.
>
> Changes since v1:
> - Unbinding is done in submit_init only. submit_begin() removed.
> - MMU_NOTFIER -> MMU_NOTIFIER
> Changes since v2:
> - Make i915->mm.notifier a spinlock.
> Changes since v3:
> - Add WARN_ON if there are any page references left, should have been 0.
> - Return 0 on success in submit_init(), bug from spinlock conversion.
> - Release pvec outside of notifier_lock (Thomas).
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
There are a number of failures in gem_userptr_blits (that has a patch by 
Chris enabling it to run properly) that needs investigating.
> ---
>   .../gpu/drm/i915/gem/i915_gem_execbuffer.c    |  94 ++-
>   drivers/gpu/drm/i915/gem/i915_gem_object.h    |  35 +-
>   .../gpu/drm/i915/gem/i915_gem_object_types.h  |  10 +-
>   drivers/gpu/drm/i915/gem/i915_gem_pages.c     |   2 +-
>   drivers/gpu/drm/i915/gem/i915_gem_userptr.c   | 765 +++++-------------
>   drivers/gpu/drm/i915/i915_drv.h               |   9 +-
>   drivers/gpu/drm/i915/i915_gem.c               |   5 +-
>   7 files changed, 334 insertions(+), 586 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> index 89d7e7980eae..c9db199c4d81 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> @@ -52,14 +52,16 @@ enum {
>   /* __EXEC_OBJECT_NO_RESERVE is BIT(31), defined in i915_vma.h */
>   #define __EXEC_OBJECT_HAS_PIN		BIT(30)
>   #define __EXEC_OBJECT_HAS_FENCE		BIT(29)
> -#define __EXEC_OBJECT_NEEDS_MAP		BIT(28)
> -#define __EXEC_OBJECT_NEEDS_BIAS	BIT(27)
> -#define __EXEC_OBJECT_INTERNAL_FLAGS	(~0u << 27) /* all of the above + */
> +#define __EXEC_OBJECT_USERPTR_INIT	BIT(28)
> +#define __EXEC_OBJECT_NEEDS_MAP		BIT(27)
> +#define __EXEC_OBJECT_NEEDS_BIAS	BIT(26)
> +#define __EXEC_OBJECT_INTERNAL_FLAGS	(~0u << 26) /* all of the above + */
>   #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE)
>   
>   #define __EXEC_HAS_RELOC	BIT(31)
>   #define __EXEC_ENGINE_PINNED	BIT(30)
> -#define __EXEC_INTERNAL_FLAGS	(~0u << 30)
> +#define __EXEC_USERPTR_USED	BIT(29)
> +#define __EXEC_INTERNAL_FLAGS	(~0u << 29)
>   #define UPDATE			PIN_OFFSET_FIXED
>   
>   #define BATCH_OFFSET_BIAS (256*1024)
> @@ -865,6 +867,19 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb)
>   		}
>   
>   		eb_add_vma(eb, i, batch, vma);
> +
> +		if (i915_gem_object_is_userptr(vma->obj)) {
> +			err = i915_gem_object_userptr_submit_init(vma->obj);
> +			if (err) {
> +				if (i + 1 < eb->buffer_count)
> +					eb->vma[i + 1].vma = NULL;

Why i+1 here? Perhaps worth a code comment? }

...

>   
> +#ifdef CONFIG_MMU_NOTIFIER
> +	if (!err && (eb->args->flags & __EXEC_USERPTR_USED)) {
> +		spin_lock(&eb->i915->mm.notifier_lock);
> +
> +		/*
> +		 * count is always at least 1, otherwise __EXEC_USERPTR_USED
> +		 * could not have been set
> +		 */
> +		for (i = count - 1; i; i--) {

Aren't we missing index 0 here?

> +			struct eb_vma *ev = &eb->vma[i];
> +			struct drm_i915_gem_object *obj = ev->vma->obj;
> +
> +			if (!i915_gem_object_is_userptr(obj))
> +				continue;
> +
> +			err = i915_gem_object_userptr_submit_done(obj);
> +			if (err)
> +				break;

Is there a chance we could avoid setting the fence for this object if we 
need to restart with -EAGAIN and thus submit an empty batchbuffer? 
Because if we allow setting a fence even when returning -EAGAIN, that 
would likely not be the fence waited for in the invalidation callback, 
but rather a fence waited for during unbind in the next submit_init 
which is undesirable.

> +		}
> +
> +		spin_unlock(&eb->i915->mm.notifier_lock);
> +	}
> +#endif
> +
...
> +/**
> + * i915_gem_userptr_invalidate - callback to notify about mm change
> + *
> + * @mni: the range (mm) is about to update
> + * @range: details on the invalidation
> + * @cur_seq: Value to pass to mmu_interval_set_seq()
> + *
> + * Block for operations on BOs to finish and mark pages as accessed and
> + * potentially dirty.
> + */
> +static bool i915_gem_userptr_invalidate(struct mmu_interval_notifier *mni,
> +					const struct mmu_notifier_range *range,
> +					unsigned long cur_seq)
>   {
> -	struct i915_mmu_notifier *mn =
> -		container_of(_mn, struct i915_mmu_notifier, mn);
> -	struct interval_tree_node *it;
> -	unsigned long end;
> -	int ret = 0;
> -
> -	if (RB_EMPTY_ROOT(&mn->objects.rb_root))
> -		return 0;
> -
> -	/* interval ranges are inclusive, but invalidate range is exclusive */
> -	end = range->end - 1;
> -
> -	spin_lock(&mn->lock);
> -	it = interval_tree_iter_first(&mn->objects, range->start, end);
> -	while (it) {
> -		struct drm_i915_gem_object *obj;
> -
> -		if (!mmu_notifier_range_blockable(range)) {
> -			ret = -EAGAIN;
> -			break;
> -		}
> +	struct drm_i915_gem_object *obj = container_of(mni, struct drm_i915_gem_object, userptr.notifier);
> +	struct drm_i915_private *i915 = to_i915(obj->base.dev);
> +	long r;
>   
> -		/*
> -		 * The mmu_object is released late when destroying the
> -		 * GEM object so it is entirely possible to gain a
> -		 * reference on an object in the process of being freed
> -		 * since our serialisation is via the spinlock and not
> -		 * the struct_mutex - and consequently use it after it
> -		 * is freed and then double free it. To prevent that
> -		 * use-after-free we only acquire a reference on the
> -		 * object if it is not in the process of being destroyed.
> -		 */
> -		obj = container_of(it, struct i915_mmu_object, it)->obj;
> -		if (!kref_get_unless_zero(&obj->base.refcount)) {
> -			it = interval_tree_iter_next(it, range->start, end);
> -			continue;
> -		}
> -		spin_unlock(&mn->lock);
> +	if (!mmu_notifier_range_blockable(range))
> +		return false;
>   
> -		ret = i915_gem_object_unbind(obj,
> -					     I915_GEM_OBJECT_UNBIND_ACTIVE |
> -					     I915_GEM_OBJECT_UNBIND_BARRIER);
> -		if (ret == 0)
> -			ret = __i915_gem_object_put_pages(obj);
> -		i915_gem_object_put(obj);
> -		if (ret)
> -			return ret;

If we add an additional fence wait here before setting the seq (which 
takes the invalidation write seqlock), we'd reduce (but definitely not 
eliminate) the chance of waiting inside the invalidation write seqlock, 
which could trigger a wait in submit_init until the write_seqlock is 
released. That would make the new userptr invalidation similarly 
unlikely to trigger a wait in the command submission path as the 
previous userptr invalidation.

> +	spin_lock(&i915->mm.notifier_lock);
>   
> -		spin_lock(&mn->lock);
> +	mmu_interval_set_seq(mni, cur_seq);
>   
> -		/*
> -		 * As we do not (yet) protect the mmu from concurrent insertion
> -		 * over this range, there is no guarantee that this search will
> -		 * terminate give 	if (unlikely(err))
>   		goto err_skip;
>   
> @@ -3347,7 +3414,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>   
>   	err = eb_lookup_vmas(&eb);
>   	if (err) {
> -		eb_release_vmas(&eb, true);
> +		eb_release_vmas(&eb, true, true);
>   		goto err_engine;
>   	}
>   
> @@ -3419,6 +3486,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>   
>   	trace_i915_request_queue(eb.request, eb.batch_flags);
>   	err = eb_submit(&eb, batch);
> +
>   err_request:
>   	i915_request_get(eb.request);
>   	eb_request_add(&eb);
> @@ -3439,7 +3507,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>   	i915_request_put(eb.request);
>   
>   err_vma:
> -	eb_release_vmas(&eb, true);
> +	eb_release_vmas(&eb, true, true);
>   	if (eb.trampoline)
>   		i915_vma_unpin(eb.trampoline);
>   	WARN_ON(err == -EDEADLK);

/Thomas


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  reply	other threads:[~2020-10-19  7:30 UTC|newest]

Thread overview: 139+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-16 10:43 [Intel-gfx] [PATCH v4 00/61] drm/i915: Remove obj->mm.lock! Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 01/61] drm/i915: Move cmd parser pinning to execbuffer Maarten Lankhorst
2020-11-03 13:49   ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 02/61] drm/i915: Add missing -EDEADLK handling to execbuf pinning Maarten Lankhorst
2020-10-20 20:18   ` Matthew Brost
2020-10-30  8:43     ` Maarten Lankhorst
2020-10-30 15:11   ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 03/61] drm/i915: Do not share hwsp across contexts any more, v4 Maarten Lankhorst
2020-10-16 10:59   ` [Intel-gfx] [PATCH v4] " Maarten Lankhorst
2020-10-19 12:49     ` [Intel-gfx] [PATCH] drm/i915: Do not share hwsp across contexts any more, v5 Maarten Lankhorst
2020-10-19 13:01       ` [Intel-gfx] [PATCH v5.1] " Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 04/61] drm/i915: Pin timeline map after first timeline pin, v3 Maarten Lankhorst
2020-10-16 12:30   ` [Intel-gfx] [PATCH v4.1] " Maarten Lankhorst
2020-10-16 14:16     ` [Intel-gfx] [PATCH v4.2] " Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 05/61] drm/i915: Ensure we hold the object mutex in pin correctly Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 06/61] drm/i915: Add gem object locking to madvise Maarten Lankhorst
2020-10-30  8:26   ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 07/61] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Maarten Lankhorst
2020-10-30  8:31   ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 08/61] drm/i915: Rework struct phys attachment handling Maarten Lankhorst
2020-10-30  8:34   ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 09/61] drm/i915: Convert i915_gem_object_attach_phys() to ww locking Maarten Lankhorst
2020-10-30  8:38   ` Thomas Hellström (Intel)
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 10/61] drm/i915: make lockdep slightly happier about execbuf Maarten Lankhorst
2020-10-30  8:59   ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 11/61] drm/i915: Disable userptr pread/pwrite support Maarten Lankhorst
2020-10-30  9:03   ` Thomas Hellström
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 12/61] drm/i915: No longer allow exporting userptr through dma-buf Maarten Lankhorst
2020-10-30  9:04   ` Thomas Hellström (Intel)
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 13/61] drm/i915: Reject more ioctls for userptr Maarten Lankhorst
2020-10-30  9:22   ` Thomas Hellström (Intel)
2020-10-30  9:56     ` Maarten Lankhorst
2020-10-30 14:14       ` Thomas Hellström (Intel)
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 14/61] drm/i915: Reject UNSYNCHRONIZED " Maarten Lankhorst
2020-10-30  9:26   ` Thomas Hellström (Intel)
2020-10-30 10:10     ` Maarten Lankhorst
2020-10-30 14:15       ` Thomas Hellström (Intel)
2020-10-30 10:11     ` Maarten Lankhorst
2020-10-30 14:18       ` Thomas Hellström (Intel)
2020-11-02  8:50         ` Maarten Lankhorst
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 15/61] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v4 Maarten Lankhorst
2020-10-19  7:30   ` Thomas Hellström (Intel) [this message]
2020-10-19  7:52     ` Thomas Hellström (Intel)
2020-10-19  8:10     ` Maarten Lankhorst
2020-10-20  6:28       ` Thomas Hellström (Intel)
2020-10-16 10:43 ` [Intel-gfx] [PATCH v4 16/61] drm/i915: Flatten obj->mm.lock Maarten Lankhorst
2020-10-30  9:36   ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 17/61] drm/i915: Populate logical context during first pin Maarten Lankhorst
2020-10-30  9:42   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 18/61] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2 Maarten Lankhorst
2020-10-30  9:46   ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 19/61] drm/i915: Handle ww locking in init_status_page Maarten Lankhorst
2020-10-30  9:48   ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 20/61] drm/i915: Rework clflush to work correctly without obj->mm.lock Maarten Lankhorst
2020-10-30 15:08   ` Thomas Hellström
2020-11-02  8:48     ` Maarten Lankhorst
2020-11-02  9:22       ` Thomas Hellström
2020-11-05  7:10         ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 21/61] drm/i915: Pass ww ctx to intel_pin_to_display_plane Maarten Lankhorst
2020-11-03 13:54   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 22/61] drm/i915: Add object locking to vm_fault_cpu Maarten Lankhorst
2020-10-30 15:14   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 23/61] drm/i915: Move pinning to inside engine_wa_list_verify() Maarten Lankhorst
2020-10-30 15:17   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 24/61] drm/i915: Take reservation lock around i915_vma_pin Maarten Lankhorst
2020-10-30 15:21   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 25/61] drm/i915: Make intel_init_workaround_bb more compatible with ww locking Maarten Lankhorst
2020-10-30 15:23   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 26/61] drm/i915: Make __engine_unpark() " Maarten Lankhorst
2020-10-16 14:08   ` [Intel-gfx] [PATCH v4.1] " Maarten Lankhorst
2020-10-30 15:25   ` [Intel-gfx] [PATCH v4 26/61] " Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 27/61] drm/i915: Take obj lock around set_domain ioctl Maarten Lankhorst
2020-11-02  9:56   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 28/61] drm/i915: Defer pin calls in buffer pool until first use by caller Maarten Lankhorst
2020-11-02  9:53   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 29/61] drm/i915: Fix pread/pwrite to work with new locking rules Maarten Lankhorst
2020-11-02 10:00   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 30/61] drm/i915: Fix workarounds selftest, part 1 Maarten Lankhorst
2020-11-02 10:06   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 31/61] drm/i915: Prepare for obj->mm.lock removal Maarten Lankhorst
2020-11-02 10:13   ` Thomas Hellström
2020-11-04 16:01     ` Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 32/61] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Maarten Lankhorst
2020-11-03  8:55   ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 33/61] drm/i915: Add ww locking around vm_access() Maarten Lankhorst
2020-11-03  8:56   ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 34/61] drm/i915: Increase ww locking for perf Maarten Lankhorst
2020-11-03  8:58   ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 35/61] drm/i915: Lock ww in ucode objects correctly Maarten Lankhorst
2020-11-03  9:00   ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 36/61] drm/i915: Add ww locking to dma-buf ops Maarten Lankhorst
2020-11-03  9:02   ` Thomas Hellström (Intel)
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 37/61] drm/i915: Add missing ww lock in intel_dsb_prepare Maarten Lankhorst
2020-11-03  9:04   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 38/61] drm/i915: Fix ww locking in shmem_create_from_object Maarten Lankhorst
2020-11-03  9:06   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 39/61] drm/i915: Use a single page table lock for each gtt Maarten Lankhorst
2020-11-03  9:09   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 40/61] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Maarten Lankhorst
2020-11-03 13:21   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 41/61] drm/i915/selftests: Prepare client blit " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 42/61] drm/i915/selftests: Prepare coherency tests " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 43/61] drm/i915/selftests: Prepare context " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 44/61] drm/i915/selftests: Prepare dma-buf " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 45/61] drm/i915/selftests: Prepare execbuf " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 46/61] drm/i915/selftests: Prepare mman testcases " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 47/61] drm/i915/selftests: Prepare object tests " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 48/61] drm/i915/selftests: Prepare object blit " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 49/61] drm/i915/selftests: Prepare igt_gem_utils " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 50/61] drm/i915/selftests: Prepare context selftest " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 51/61] drm/i915/selftests: Prepare hangcheck " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 52/61] drm/i915/selftests: Prepare execlists " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 53/61] drm/i915/selftests: Prepare mocs tests " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 54/61] drm/i915/selftests: Prepare ring submission " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 55/61] drm/i915/selftests: Prepare timeline tests " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 56/61] drm/i915/selftests: Prepare i915_request " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 57/61] drm/i915/selftests: Prepare memory region " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 58/61] drm/i915/selftests: Prepare cs engine " Maarten Lankhorst
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 59/61] drm/i915/selftests: Prepare gtt " Maarten Lankhorst
2020-11-03 13:27   ` Thomas Hellström
2020-11-03 13:32     ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 60/61] drm/i915: Finally remove obj->mm.lock Maarten Lankhorst
2020-11-03 13:31   ` Thomas Hellström
2020-10-16 10:44 ` [Intel-gfx] [PATCH v4 61/61] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2 Maarten Lankhorst
2020-10-19  7:02   ` Thomas Hellström (Intel)
2020-10-16 10:49 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev4) Patchwork
2020-10-16 11:18 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev5) Patchwork
2020-10-16 12:52 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev6) Patchwork
2020-10-16 15:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev8) Patchwork
2020-10-16 16:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-16 16:02 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-10-16 16:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-16 18:31 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-19 12:53 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove obj->mm.lock! (rev9) Patchwork
2020-10-19 13:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev10) Patchwork
2020-10-19 13:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-19 13:29 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-10-19 13:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-19 15:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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