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[83.50.83.154]) by smtp.gmail.com with ESMTPSA id g5sm5603945pfv.22.2022.02.05.03.16.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 05 Feb 2022 03:16:15 -0800 (PST) Message-ID: <84db72ea-9aca-43f9-2876-28a5d6d840f4@amsat.org> Date: Sat, 5 Feb 2022 12:16:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.5.1 Subject: Re: [PATCH 01/11] mos6522: add defines for IFR bit flags Content-Language: en-US To: Mark Cave-Ayland , BALATON Zoltan Cc: laurent@vivier.eu, qemu-devel@nongnu.org References: <20220127205405.23499-1-mark.cave-ayland@ilande.co.uk> <20220127205405.23499-2-mark.cave-ayland@ilande.co.uk> <9e5c4e86-8555-1a42-783f-dae53f114cd2@eik.bme.hu> <79a162bf-86f5-0ca4-5f14-822469606812@ilande.co.uk> In-Reply-To: <79a162bf-86f5-0ca4-5f14-822469606812@ilande.co.uk> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::434 (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-pf1-x434.google.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-0.001, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Reply-to: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= via On 5/2/22 11:51, Mark Cave-Ayland wrote: > On 27/01/2022 23:16, BALATON Zoltan wrote: > >> On Thu, 27 Jan 2022, Mark Cave-Ayland wrote: >>> These are intended to make it easier to see how the physical control >>> lines >>> are wired for each instance. >>> >>> Signed-off-by: Mark Cave-Ayland >>> --- >>> include/hw/misc/mos6522.h | 22 +++++++++++++++------- >>> 1 file changed, 15 insertions(+), 7 deletions(-) >>> >>> diff --git a/include/hw/misc/mos6522.h b/include/hw/misc/mos6522.h >>> index fc95d22b0f..12abd8b8d2 100644 >>> --- a/include/hw/misc/mos6522.h >>> +++ b/include/hw/misc/mos6522.h >>> @@ -41,13 +41,21 @@ >>> #define IER_SET            0x80    /* set bits in IER */ >>> #define IER_CLR            0       /* clear bits in IER */ >>> >>> -#define CA2_INT            0x01 >>> -#define CA1_INT            0x02 >>> -#define SR_INT             0x04    /* Shift register full/empty */ >>> -#define CB2_INT            0x08 >>> -#define CB1_INT            0x10 >>> -#define T2_INT             0x20    /* Timer 2 interrupt */ >>> -#define T1_INT             0x40    /* Timer 1 interrupt */ >>> +#define CA2_INT_BIT        0 >>> +#define CA1_INT_BIT        1 >>> +#define SR_INT_BIT         2       /* Shift register full/empty */ >>> +#define CB2_INT_BIT        3 >>> +#define CB1_INT_BIT        4 >>> +#define T2_INT_BIT         5       /* Timer 2 interrupt */ >>> +#define T1_INT_BIT         6       /* Timer 1 interrupt */ >>> + >>> +#define CA2_INT            (1 << CA2_INT_BIT) >>> +#define CA1_INT            (1 << CA1_INT_BIT) >>> +#define SR_INT             (1 << SR_INT_BIT) >>> +#define CB2_INT            (1 << CB2_INT_BIT) >>> +#define CB1_INT            (1 << CB1_INT_BIT) >>> +#define T2_INT             (1 << T2_INT_BIT) >>> +#define T1_INT             (1 << T1_INT_BIT) >> >> Maybe you could leave the #defines called XX_INT and then use >> BIT(XX_INT) instead of the second set of #defines which would provide >> same readability but with less #defines needed. > > I'm not so keen on removing the _INT defines since that would require > updating all users to use BIT() everywhere which I don't think gains us > much. I could certainly replace these definitions with BIT(FOO) instead > of (1 << FOO) if that helps readability though. Do you mean simply doing this? -#define T1_INT 0x40 /* Timer 1 interrupt */ +#define T1_INT BIT(6) /* Timer 1 interrupt */