From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966078AbcA1NVM (ORCPT ); Thu, 28 Jan 2016 08:21:12 -0500 Received: from mail-sn1nam02on0063.outbound.protection.outlook.com ([104.47.36.63]:16608 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932651AbcA1NVH convert rfc822-to-8bit (ORCPT ); Thu, 28 Jan 2016 08:21:07 -0500 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Bharat Kumar Gogada To: Arnd Bergmann CC: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri Subject: RE: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Thread-Topic: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Thread-Index: AQHRTV/L8+mymSE9NEWCKEIBcVWY0J737/aAgBeS8pD//4cVAIAB9iWg Date: Thu, 28 Jan 2016 13:20:56 +0000 Message-ID: <8520D5D51A55D047800579B09414719825874148@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <4734542.KZZp0TeeeM@wuerfel> <8520D5D51A55D047800579B09414719825873DA8@XAP-PVEXMBX01.xlnx.xilinx.com> <5255218.OREPu5Af3W@wuerfel> In-Reply-To: <5255218.OREPu5Af3W@wuerfel> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.23.97.131] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22096.000 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(24454002)(189002)(199003)(5001960100002)(2920100001)(54356999)(106466001)(3846002)(23726003)(102836003)(2950100001)(110136002)(47776003)(1096002)(11100500001)(107886002)(2900100001)(1220700001)(4001430100002)(50986999)(6116002)(106116001)(5008740100001)(5003600100002)(586003)(33656002)(76176999)(6806005)(81156007)(189998001)(87936001)(55846006)(97756001)(4326007)(86362001)(5004730100002)(50466002)(5250100002)(63266004)(2906002)(46406003)(93886004)(92566002)(107986001)(5001870100001);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1NAM02HT010;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;PTR:xapps1.xilinx.com,unknown-60-100.xilinx.com;MX:1;A:1;LANG:en; X-MS-Office365-Filtering-Correlation-Id: 48e16c5f-ac7e-4bfc-2d77-08d327e5ddf3 X-Exchange-Antispam-Report-Test: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:CY1NAM02HT010;UriScan:; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(13015025)(13024025)(13017025)(5005006)(8121501046)(13023025)(13018025)(10201501046)(3002001);SRVR:CY1NAM02HT010;BCL:0;PCL:0;RULEID:;SRVR:CY1NAM02HT010; X-Forefront-PRVS: 083526BF8A X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2016 13:21:00.4382 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1NAM02HT010 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Subject: Re: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver > to work on both Zynq and Microblaze > > On Wednesday 27 January 2016 14:33:45 Bharat Kumar Gogada wrote: > > > > @@ -705,7 +715,9 @@ static int xilinx_pcie_probe(struct > > > > platform_device *pdev) #endif > > > > pci_scan_child_bus(bus); > > > > pci_assign_unassigned_bus_resources(bus); > > > > +#ifdef CONFIG_ARM > > > > pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); > > > > +#endif > > > > pci_bus_add_devices(bus); > > > > platform_set_drvdata(pdev, port); > > > > > > Here it looks like microblaze gets it right. I'm not sure why we > > > still need the > > > pci_fixup_irqs() on ARM, but my feeling is that this should be fixed > > > in common code. > > In arm pci_fixup_irqs is called by pci_common_init_dev > (arch/arm/kernel/bios32.c), since this API is removed now, I was calling it > separately. > > But who calls it in microblaze? If it works without the extra call there, can we > make it work the same way for ARM? > In microblaze I have added pcibios_add_device call (similar to call in arch/arm64/kernel/pci.c ) in pci-common.c, which is being invoked by kernel core itself. May be we can add similar on arm and test out, but we might need some cleanup in arch/arm/kernel/bios32.c Bharat From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bharat Kumar Gogada Subject: RE: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Thu, 28 Jan 2016 13:20:56 +0000 Message-ID: <8520D5D51A55D047800579B09414719825874148@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <4734542.KZZp0TeeeM@wuerfel> <8520D5D51A55D047800579B09414719825873DA8@XAP-PVEXMBX01.xlnx.xilinx.com> <5255218.OREPu5Af3W@wuerfel> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Return-path: In-Reply-To: <5255218.OREPu5Af3W@wuerfel> Content-Language: en-US Sender: linux-pci-owner@vger.kernel.org To: Arnd Bergmann Cc: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , linux-p List-Id: devicetree@vger.kernel.org > Subject: Re: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver > to work on both Zynq and Microblaze > > On Wednesday 27 January 2016 14:33:45 Bharat Kumar Gogada wrote: > > > > @@ -705,7 +715,9 @@ static int xilinx_pcie_probe(struct > > > > platform_device *pdev) #endif > > > > pci_scan_child_bus(bus); > > > > pci_assign_unassigned_bus_resources(bus); > > > > +#ifdef CONFIG_ARM > > > > pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); > > > > +#endif > > > > pci_bus_add_devices(bus); > > > > platform_set_drvdata(pdev, port); > > > > > > Here it looks like microblaze gets it right. I'm not sure why we > > > still need the > > > pci_fixup_irqs() on ARM, but my feeling is that this should be fixed > > > in common code. > > In arm pci_fixup_irqs is called by pci_common_init_dev > (arch/arm/kernel/bios32.c), since this API is removed now, I was calling it > separately. > > But who calls it in microblaze? If it works without the extra call there, can we > make it work the same way for ARM? > In microblaze I have added pcibios_add_device call (similar to call in arch/arm64/kernel/pci.c ) in pci-common.c, which is being invoked by kernel core itself. May be we can add similar on arm and test out, but we might need some cleanup in arch/arm/kernel/bios32.c Bharat From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-sn1nam02on0063.outbound.protection.outlook.com ([104.47.36.63]:16608 "EHLO NAM02-SN1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932651AbcA1NVH convert rfc822-to-8bit (ORCPT ); Thu, 28 Jan 2016 08:21:07 -0500 From: Bharat Kumar Gogada To: Arnd Bergmann CC: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri Subject: RE: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze Date: Thu, 28 Jan 2016 13:20:56 +0000 Message-ID: <8520D5D51A55D047800579B09414719825874148@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <4734542.KZZp0TeeeM@wuerfel> <8520D5D51A55D047800579B09414719825873DA8@XAP-PVEXMBX01.xlnx.xilinx.com> <5255218.OREPu5Af3W@wuerfel> In-Reply-To: <5255218.OREPu5Af3W@wuerfel> Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org List-ID: > Subject: Re: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver > to work on both Zynq and Microblaze > > On Wednesday 27 January 2016 14:33:45 Bharat Kumar Gogada wrote: > > > > @@ -705,7 +715,9 @@ static int xilinx_pcie_probe(struct > > > > platform_device *pdev) #endif > > > > pci_scan_child_bus(bus); > > > > pci_assign_unassigned_bus_resources(bus); > > > > +#ifdef CONFIG_ARM > > > > pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); > > > > +#endif > > > > pci_bus_add_devices(bus); > > > > platform_set_drvdata(pdev, port); > > > > > > Here it looks like microblaze gets it right. I'm not sure why we > > > still need the > > > pci_fixup_irqs() on ARM, but my feeling is that this should be fixed > > > in common code. > > In arm pci_fixup_irqs is called by pci_common_init_dev > (arch/arm/kernel/bios32.c), since this API is removed now, I was calling it > separately. > > But who calls it in microblaze? If it works without the extra call there, can we > make it work the same way for ARM? > In microblaze I have added pcibios_add_device call (similar to call in arch/arm64/kernel/pci.c ) in pci-common.c, which is being invoked by kernel core itself. May be we can add similar on arm and test out, but we might need some cleanup in arch/arm/kernel/bios32.c Bharat From mboxrd@z Thu Jan 1 00:00:00 1970 From: bharat.kumar.gogada@xilinx.com (Bharat Kumar Gogada) Date: Thu, 28 Jan 2016 13:20:56 +0000 Subject: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver to work on both Zynq and Microblaze In-Reply-To: <5255218.OREPu5Af3W@wuerfel> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <4734542.KZZp0TeeeM@wuerfel> <8520D5D51A55D047800579B09414719825873DA8@XAP-PVEXMBX01.xlnx.xilinx.com> <5255218.OREPu5Af3W@wuerfel> Message-ID: <8520D5D51A55D047800579B09414719825874148@XAP-PVEXMBX01.xlnx.xilinx.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org > Subject: Re: [PATCH V2 3/5] PCI: xilinx: Modifying AXI PCIe Host Bridge driver > to work on both Zynq and Microblaze > > On Wednesday 27 January 2016 14:33:45 Bharat Kumar Gogada wrote: > > > > @@ -705,7 +715,9 @@ static int xilinx_pcie_probe(struct > > > > platform_device *pdev) #endif > > > > pci_scan_child_bus(bus); > > > > pci_assign_unassigned_bus_resources(bus); > > > > +#ifdef CONFIG_ARM > > > > pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); > > > > +#endif > > > > pci_bus_add_devices(bus); > > > > platform_set_drvdata(pdev, port); > > > > > > Here it looks like microblaze gets it right. I'm not sure why we > > > still need the > > > pci_fixup_irqs() on ARM, but my feeling is that this should be fixed > > > in common code. > > In arm pci_fixup_irqs is called by pci_common_init_dev > (arch/arm/kernel/bios32.c), since this API is removed now, I was calling it > separately. > > But who calls it in microblaze? If it works without the extra call there, can we > make it work the same way for ARM? > In microblaze I have added pcibios_add_device call (similar to call in arch/arm64/kernel/pci.c ) in pci-common.c, which is being invoked by kernel core itself. May be we can add similar on arm and test out, but we might need some cleanup in arch/arm/kernel/bios32.c Bharat