From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757250AbcBCQJL (ORCPT ); Wed, 3 Feb 2016 11:09:11 -0500 Received: from mail-bl2nam02on0071.outbound.protection.outlook.com ([104.47.38.71]:55173 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753068AbcBCQJI convert rfc822-to-8bit (ORCPT ); Wed, 3 Feb 2016 11:09:08 -0500 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; lists.infradead.org; dkim=none (message not signed) header.d=none;lists.infradead.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Bharat Kumar Gogada To: Bjorn Helgaas CC: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "arnd@arndb.de" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri Subject: RE: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Thread-Topic: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Thread-Index: AQHRTV/WidMO9SZdZ0qxspjCfwADM58al4Cg//9/UwCAAIZfkA== Date: Wed, 3 Feb 2016 16:08:58 +0000 Message-ID: <8520D5D51A55D047800579B0941471982587F05F@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1452620173-4905-6-git-send-email-bharatku@xilinx.com> <8520D5D51A55D047800579B0941471982587F02E@XAP-PVEXMBX01.xlnx.xilinx.com> <20160203155920.GB32546@localhost> In-Reply-To: <20160203155920.GB32546@localhost> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.23.96.57] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22108.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(189002)(199003)(4326007)(11100500001)(106466001)(5008740100001)(55846006)(87936001)(46406003)(110136002)(93886004)(19580405001)(106116001)(2906002)(97756001)(189998001)(47776003)(63266004)(23726003)(33656002)(1220700001)(6116002)(586003)(5004730100002)(50466002)(5001960100002)(15975445007)(5003600100002)(1096002)(54356999)(3846002)(4001430100002)(2950100001)(92566002)(76176999)(107886002)(102836003)(2900100001)(6806005)(5250100002)(19580395003)(86362001)(50986999)(41533002)(107986001)(422495003);DIR:OUT;SFP:1101;SCL:1;SRVR:SN1NAM02HT183;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;MLV:sfv;MX:1;A:1;LANG:en; X-MS-Office365-Filtering-Correlation-Id: bcc5065b-b17c-4bc9-26c7-08d32cb45636 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:SN1NAM02HT183; X-Microsoft-Antispam-PRVS: <7b7a70911b21433db8437db3eea96f7b@SN1NAM02HT183.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:(192813158149592); X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(13023025)(5005006)(13024025)(13018025)(8121501046)(13015025)(13017025)(3002001)(10201501046);SRVR:SN1NAM02HT183;BCL:0;PCL:0;RULEID:;SRVR:SN1NAM02HT183; X-Forefront-PRVS: 08417837C5 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Feb 2016 16:09:03.3996 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT183 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > You said you were going to do another revision, so I'm waiting for r3. Hi Bjorn, Do you have any comments on this patch (5/5), I will address other patches comments along with this patch, if any, in v3. Bharat > > > > This patch does required modifications to microblaze PCI subsystem, > > > to work with generic driver (drivers/pci/host/pcie-xilinx.c) on > > > Microblaze and Zynq. > > > > > > Signed-off-by: Bharat Kumar Gogada > > > Signed-off-by: Ravi Kiran Gummaluri > > > --- > > > Changes: > > > Modified pcibios_fixup_bus in pci-common.c, as per generic > architecuture. > > > Modified pcibios_align_resource in pci-common.c, as per generic > > > architecuture. > > > Modified pcibios_get_phb_of_node function in pci-common.c, to > remove > > > dependency on struct pci_controller. > > > Removed pci_domain_nr in pci-common.c, instead using generic code. > > > Added pcibios_add_device in pci-common.c, as per generic > architecuture. > > > Adding Kernel configuration in arch/microblaze as required for > > > generic PCI domains. > > > Added kernel configuration for driver to support Microblaze. > > > --- > > > arch/microblaze/Kconfig | 3 ++ > > > arch/microblaze/pci/pci-common.c | 61 > > > +++++++++++++++-------------------- > > > ----- > > > drivers/pci/host/Kconfig | 2 +- > > > 3 files changed, 27 insertions(+), 39 deletions(-) > > > > > > diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index > > > 0bce820..c3702b9 100644 > > > --- a/arch/microblaze/Kconfig > > > +++ b/arch/microblaze/Kconfig > > > @@ -271,6 +271,9 @@ config PCI > > > config PCI_DOMAINS > > > def_bool PCI > > > > > > +config PCI_DOMAINS_GENERIC > > > + def_bool PCI_DOMAINS > > > + > > > config PCI_SYSCALL > > > def_bool PCI > > > > > > diff --git a/arch/microblaze/pci/pci-common.c > > > b/arch/microblaze/pci/pci- common.c index ae838ed..bc72856 100644 > > > --- a/arch/microblaze/pci/pci-common.c > > > +++ b/arch/microblaze/pci/pci-common.c > > > @@ -123,17 +123,6 @@ unsigned long pci_address_to_pio(phys_addr_t > > > address) > > > } > > > EXPORT_SYMBOL_GPL(pci_address_to_pio); > > > > > > -/* > > > - * Return the domain number for this bus. > > > - */ > > > -int pci_domain_nr(struct pci_bus *bus) -{ > > > - struct pci_controller *hose = pci_bus_to_host(bus); > > > - > > > - return hose->global_number; > > > -} > > > -EXPORT_SYMBOL(pci_domain_nr); > > > - > > > /* This routine is meant to be used early during boot, when the > > > * PCI bus numbers have not yet been assigned, and you need to > > > * issue PCI config cycles to an OF device. > > > @@ -863,26 +852,10 @@ void pcibios_setup_bus_devices(struct pci_bus > > > *bus) > > > > > > void pcibios_fixup_bus(struct pci_bus *bus) { > > > - /* When called from the generic PCI probe, read PCI<->PCI bridge > > > - * bases. This is -not- called when generating the PCI tree from > > > - * the OF device-tree. > > > - */ > > > - if (bus->self != NULL) > > > - pci_read_bridge_bases(bus); > > > - > > > - /* Now fixup the bus bus */ > > > - pcibios_setup_bus_self(bus); > > > - > > > - /* Now fixup devices on that bus */ > > > - pcibios_setup_bus_devices(bus); > > > + /* nothing to do */ > > > } > > > EXPORT_SYMBOL(pcibios_fixup_bus); > > > > > > -static int skip_isa_ioresource_align(struct pci_dev *dev) -{ > > > - return 0; > > > -} > > > - > > > /* > > > * We need to avoid collisions with `mirrored' VGA ports > > > * and other strange ISA hardware, so we always want the @@ -899,20 > > > +872,20 @@ static int skip_isa_ioresource_align(struct pci_dev > > > *dev) > > > resource_size_t pcibios_align_resource(void *data, const struct > > > resource *res, > > > resource_size_t size, resource_size_t align) { > > > - struct pci_dev *dev = data; > > > resource_size_t start = res->start; > > > > > > - if (res->flags & IORESOURCE_IO) { > > > - if (skip_isa_ioresource_align(dev)) > > > - return start; > > > - if (start & 0x300) > > > - start = (start + 0x3ff) & ~0x3ff; > > > - } > > > - > > > return start; > > > } > > > EXPORT_SYMBOL(pcibios_align_resource); > > > > > > +int pcibios_add_device(struct pci_dev *dev) { > > > + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); > > > + > > > + return 0; > > > +} > > > +EXPORT_SYMBOL(pcibios_add_device); > > > + > > > /* > > > * Reparent resource children of pr that conflict with res > > > * under res, and make res replace those children. > > > @@ -1335,9 +1308,21 @@ static void > > > pcibios_setup_phb_resources(struct > > > pci_controller *hose, > > > > > > struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) { > > > - struct pci_controller *hose = bus->sysdata; > > > + struct device_node *np; > > > + > > > + for_each_node_by_type(np, "pci") { > > > + const void *prop; > > > + unsigned int bus_min; > > > + > > > + prop = of_get_property(np, "bus-range", NULL); > > > + if (!prop) > > > + continue; > > > + bus_min = be32_to_cpup(prop); > > > + if (bus->number == bus_min) > > > + return np; > > > + } > > > > > > - return of_node_get(hose->dn); > > > + return NULL; > > > } > > > > > > static void pcibios_scan_phb(struct pci_controller *hose) diff > > > --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig index > > > d5e58ba..7c56c2e 100644 > > > --- a/drivers/pci/host/Kconfig > > > +++ b/drivers/pci/host/Kconfig > > > @@ -79,7 +79,7 @@ config PCI_KEYSTONE > > > > > > config PCIE_XILINX > > > bool "Xilinx AXI PCIe host bridge support" > > > - depends on ARCH_ZYNQ > > > + depends on ARCH_ZYNQ || MICROBLAZE > > > help > > > Say 'Y' here if you want kernel to support the Xilinx AXI PCIe > > > Host Bridge driver. > > > -- > > > 2.1.1 > > > > -- > > To unsubscribe from this list: send the line "unsubscribe linux-pci" > > in the body of a message to majordomo@vger.kernel.org More > majordomo > > info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bharat Kumar Gogada Subject: RE: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Date: Wed, 3 Feb 2016 16:08:58 +0000 Message-ID: <8520D5D51A55D047800579B0941471982587F05F@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1452620173-4905-6-git-send-email-bharatku@xilinx.com> <8520D5D51A55D047800579B0941471982587F02E@XAP-PVEXMBX01.xlnx.xilinx.com> <20160203155920.GB32546@localhost> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Return-path: In-Reply-To: <20160203155920.GB32546@localhost> Content-Language: en-US Sender: linux-pci-owner@vger.kernel.org To: Bjorn Helgaas Cc: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "arnd@arndb.de" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" "linux-kernel@vger.kernel.org" List-Id: devicetree@vger.kernel.org > You said you were going to do another revision, so I'm waiting for r3. Hi Bjorn, Do you have any comments on this patch (5/5), I will address other patches comments along with this patch, if any, in v3. Bharat > > > > This patch does required modifications to microblaze PCI subsystem, > > > to work with generic driver (drivers/pci/host/pcie-xilinx.c) on > > > Microblaze and Zynq. > > > > > > Signed-off-by: Bharat Kumar Gogada > > > Signed-off-by: Ravi Kiran Gummaluri > > > --- > > > Changes: > > > Modified pcibios_fixup_bus in pci-common.c, as per generic > architecuture. > > > Modified pcibios_align_resource in pci-common.c, as per generic > > > architecuture. > > > Modified pcibios_get_phb_of_node function in pci-common.c, to > remove > > > dependency on struct pci_controller. > > > Removed pci_domain_nr in pci-common.c, instead using generic code. > > > Added pcibios_add_device in pci-common.c, as per generic > architecuture. > > > Adding Kernel configuration in arch/microblaze as required for > > > generic PCI domains. > > > Added kernel configuration for driver to support Microblaze. > > > --- > > > arch/microblaze/Kconfig | 3 ++ > > > arch/microblaze/pci/pci-common.c | 61 > > > +++++++++++++++-------------------- > > > ----- > > > drivers/pci/host/Kconfig | 2 +- > > > 3 files changed, 27 insertions(+), 39 deletions(-) > > > > > > diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index > > > 0bce820..c3702b9 100644 > > > --- a/arch/microblaze/Kconfig > > > +++ b/arch/microblaze/Kconfig > > > @@ -271,6 +271,9 @@ config PCI > > > config PCI_DOMAINS > > > def_bool PCI > > > > > > +config PCI_DOMAINS_GENERIC > > > + def_bool PCI_DOMAINS > > > + > > > config PCI_SYSCALL > > > def_bool PCI > > > > > > diff --git a/arch/microblaze/pci/pci-common.c > > > b/arch/microblaze/pci/pci- common.c index ae838ed..bc72856 100644 > > > --- a/arch/microblaze/pci/pci-common.c > > > +++ b/arch/microblaze/pci/pci-common.c > > > @@ -123,17 +123,6 @@ unsigned long pci_address_to_pio(phys_addr_t > > > address) > > > } > > > EXPORT_SYMBOL_GPL(pci_address_to_pio); > > > > > > -/* > > > - * Return the domain number for this bus. > > > - */ > > > -int pci_domain_nr(struct pci_bus *bus) -{ > > > - struct pci_controller *hose = pci_bus_to_host(bus); > > > - > > > - return hose->global_number; > > > -} > > > -EXPORT_SYMBOL(pci_domain_nr); > > > - > > > /* This routine is meant to be used early during boot, when the > > > * PCI bus numbers have not yet been assigned, and you need to > > > * issue PCI config cycles to an OF device. > > > @@ -863,26 +852,10 @@ void pcibios_setup_bus_devices(struct pci_bus > > > *bus) > > > > > > void pcibios_fixup_bus(struct pci_bus *bus) { > > > - /* When called from the generic PCI probe, read PCI<->PCI bridge > > > - * bases. This is -not- called when generating the PCI tree from > > > - * the OF device-tree. > > > - */ > > > - if (bus->self != NULL) > > > - pci_read_bridge_bases(bus); > > > - > > > - /* Now fixup the bus bus */ > > > - pcibios_setup_bus_self(bus); > > > - > > > - /* Now fixup devices on that bus */ > > > - pcibios_setup_bus_devices(bus); > > > + /* nothing to do */ > > > } > > > EXPORT_SYMBOL(pcibios_fixup_bus); > > > > > > -static int skip_isa_ioresource_align(struct pci_dev *dev) -{ > > > - return 0; > > > -} > > > - > > > /* > > > * We need to avoid collisions with `mirrored' VGA ports > > > * and other strange ISA hardware, so we always want the @@ -899,20 > > > +872,20 @@ static int skip_isa_ioresource_align(struct pci_dev > > > *dev) > > > resource_size_t pcibios_align_resource(void *data, const struct > > > resource *res, > > > resource_size_t size, resource_size_t align) { > > > - struct pci_dev *dev = data; > > > resource_size_t start = res->start; > > > > > > - if (res->flags & IORESOURCE_IO) { > > > - if (skip_isa_ioresource_align(dev)) > > > - return start; > > > - if (start & 0x300) > > > - start = (start + 0x3ff) & ~0x3ff; > > > - } > > > - > > > return start; > > > } > > > EXPORT_SYMBOL(pcibios_align_resource); > > > > > > +int pcibios_add_device(struct pci_dev *dev) { > > > + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); > > > + > > > + return 0; > > > +} > > > +EXPORT_SYMBOL(pcibios_add_device); > > > + > > > /* > > > * Reparent resource children of pr that conflict with res > > > * under res, and make res replace those children. > > > @@ -1335,9 +1308,21 @@ static void > > > pcibios_setup_phb_resources(struct > > > pci_controller *hose, > > > > > > struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) { > > > - struct pci_controller *hose = bus->sysdata; > > > + struct device_node *np; > > > + > > > + for_each_node_by_type(np, "pci") { > > > + const void *prop; > > > + unsigned int bus_min; > > > + > > > + prop = of_get_property(np, "bus-range", NULL); > > > + if (!prop) > > > + continue; > > > + bus_min = be32_to_cpup(prop); > > > + if (bus->number == bus_min) > > > + return np; > > > + } > > > > > > - return of_node_get(hose->dn); > > > + return NULL; > > > } > > > > > > static void pcibios_scan_phb(struct pci_controller *hose) diff > > > --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig index > > > d5e58ba..7c56c2e 100644 > > > --- a/drivers/pci/host/Kconfig > > > +++ b/drivers/pci/host/Kconfig > > > @@ -79,7 +79,7 @@ config PCI_KEYSTONE > > > > > > config PCIE_XILINX > > > bool "Xilinx AXI PCIe host bridge support" > > > - depends on ARCH_ZYNQ > > > + depends on ARCH_ZYNQ || MICROBLAZE > > > help > > > Say 'Y' here if you want kernel to support the Xilinx AXI PCIe > > > Host Bridge driver. > > > -- > > > 2.1.1 > > > > -- > > To unsubscribe from this list: send the line "unsubscribe linux-pci" > > in the body of a message to majordomo@vger.kernel.org More > majordomo > > info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-bl2nam02on0071.outbound.protection.outlook.com ([104.47.38.71]:55173 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753068AbcBCQJI convert rfc822-to-8bit (ORCPT ); Wed, 3 Feb 2016 11:09:08 -0500 From: Bharat Kumar Gogada To: Bjorn Helgaas CC: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "arnd@arndb.de" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri Subject: RE: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Date: Wed, 3 Feb 2016 16:08:58 +0000 Message-ID: <8520D5D51A55D047800579B0941471982587F05F@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1452620173-4905-6-git-send-email-bharatku@xilinx.com> <8520D5D51A55D047800579B0941471982587F02E@XAP-PVEXMBX01.xlnx.xilinx.com> <20160203155920.GB32546@localhost> In-Reply-To: <20160203155920.GB32546@localhost> Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org List-ID: > You said you were going to do another revision, so I'm waiting for r3. Hi Bjorn, Do you have any comments on this patch (5/5), I will address other patches comments along with this patch, if any, in v3. Bharat > > > > This patch does required modifications to microblaze PCI subsystem, > > > to work with generic driver (drivers/pci/host/pcie-xilinx.c) on > > > Microblaze and Zynq. > > > > > > Signed-off-by: Bharat Kumar Gogada > > > Signed-off-by: Ravi Kiran Gummaluri > > > --- > > > Changes: > > > Modified pcibios_fixup_bus in pci-common.c, as per generic > architecuture. > > > Modified pcibios_align_resource in pci-common.c, as per generic > > > architecuture. > > > Modified pcibios_get_phb_of_node function in pci-common.c, to > remove > > > dependency on struct pci_controller. > > > Removed pci_domain_nr in pci-common.c, instead using generic code. > > > Added pcibios_add_device in pci-common.c, as per generic > architecuture. > > > Adding Kernel configuration in arch/microblaze as required for > > > generic PCI domains. > > > Added kernel configuration for driver to support Microblaze. > > > --- > > > arch/microblaze/Kconfig | 3 ++ > > > arch/microblaze/pci/pci-common.c | 61 > > > +++++++++++++++-------------------- > > > ----- > > > drivers/pci/host/Kconfig | 2 +- > > > 3 files changed, 27 insertions(+), 39 deletions(-) > > > > > > diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index > > > 0bce820..c3702b9 100644 > > > --- a/arch/microblaze/Kconfig > > > +++ b/arch/microblaze/Kconfig > > > @@ -271,6 +271,9 @@ config PCI > > > config PCI_DOMAINS > > > def_bool PCI > > > > > > +config PCI_DOMAINS_GENERIC > > > + def_bool PCI_DOMAINS > > > + > > > config PCI_SYSCALL > > > def_bool PCI > > > > > > diff --git a/arch/microblaze/pci/pci-common.c > > > b/arch/microblaze/pci/pci- common.c index ae838ed..bc72856 100644 > > > --- a/arch/microblaze/pci/pci-common.c > > > +++ b/arch/microblaze/pci/pci-common.c > > > @@ -123,17 +123,6 @@ unsigned long pci_address_to_pio(phys_addr_t > > > address) > > > } > > > EXPORT_SYMBOL_GPL(pci_address_to_pio); > > > > > > -/* > > > - * Return the domain number for this bus. > > > - */ > > > -int pci_domain_nr(struct pci_bus *bus) -{ > > > - struct pci_controller *hose = pci_bus_to_host(bus); > > > - > > > - return hose->global_number; > > > -} > > > -EXPORT_SYMBOL(pci_domain_nr); > > > - > > > /* This routine is meant to be used early during boot, when the > > > * PCI bus numbers have not yet been assigned, and you need to > > > * issue PCI config cycles to an OF device. > > > @@ -863,26 +852,10 @@ void pcibios_setup_bus_devices(struct pci_bus > > > *bus) > > > > > > void pcibios_fixup_bus(struct pci_bus *bus) { > > > - /* When called from the generic PCI probe, read PCI<->PCI bridge > > > - * bases. This is -not- called when generating the PCI tree from > > > - * the OF device-tree. > > > - */ > > > - if (bus->self != NULL) > > > - pci_read_bridge_bases(bus); > > > - > > > - /* Now fixup the bus bus */ > > > - pcibios_setup_bus_self(bus); > > > - > > > - /* Now fixup devices on that bus */ > > > - pcibios_setup_bus_devices(bus); > > > + /* nothing to do */ > > > } > > > EXPORT_SYMBOL(pcibios_fixup_bus); > > > > > > -static int skip_isa_ioresource_align(struct pci_dev *dev) -{ > > > - return 0; > > > -} > > > - > > > /* > > > * We need to avoid collisions with `mirrored' VGA ports > > > * and other strange ISA hardware, so we always want the @@ -899,20 > > > +872,20 @@ static int skip_isa_ioresource_align(struct pci_dev > > > *dev) > > > resource_size_t pcibios_align_resource(void *data, const struct > > > resource *res, > > > resource_size_t size, resource_size_t align) { > > > - struct pci_dev *dev = data; > > > resource_size_t start = res->start; > > > > > > - if (res->flags & IORESOURCE_IO) { > > > - if (skip_isa_ioresource_align(dev)) > > > - return start; > > > - if (start & 0x300) > > > - start = (start + 0x3ff) & ~0x3ff; > > > - } > > > - > > > return start; > > > } > > > EXPORT_SYMBOL(pcibios_align_resource); > > > > > > +int pcibios_add_device(struct pci_dev *dev) { > > > + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); > > > + > > > + return 0; > > > +} > > > +EXPORT_SYMBOL(pcibios_add_device); > > > + > > > /* > > > * Reparent resource children of pr that conflict with res > > > * under res, and make res replace those children. > > > @@ -1335,9 +1308,21 @@ static void > > > pcibios_setup_phb_resources(struct > > > pci_controller *hose, > > > > > > struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) { > > > - struct pci_controller *hose = bus->sysdata; > > > + struct device_node *np; > > > + > > > + for_each_node_by_type(np, "pci") { > > > + const void *prop; > > > + unsigned int bus_min; > > > + > > > + prop = of_get_property(np, "bus-range", NULL); > > > + if (!prop) > > > + continue; > > > + bus_min = be32_to_cpup(prop); > > > + if (bus->number == bus_min) > > > + return np; > > > + } > > > > > > - return of_node_get(hose->dn); > > > + return NULL; > > > } > > > > > > static void pcibios_scan_phb(struct pci_controller *hose) diff > > > --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig index > > > d5e58ba..7c56c2e 100644 > > > --- a/drivers/pci/host/Kconfig > > > +++ b/drivers/pci/host/Kconfig > > > @@ -79,7 +79,7 @@ config PCI_KEYSTONE > > > > > > config PCIE_XILINX > > > bool "Xilinx AXI PCIe host bridge support" > > > - depends on ARCH_ZYNQ > > > + depends on ARCH_ZYNQ || MICROBLAZE > > > help > > > Say 'Y' here if you want kernel to support the Xilinx AXI PCIe > > > Host Bridge driver. > > > -- > > > 2.1.1 > > > > -- > > To unsubscribe from this list: send the line "unsubscribe linux-pci" > > in the body of a message to majordomo@vger.kernel.org More > majordomo > > info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: bharat.kumar.gogada@xilinx.com (Bharat Kumar Gogada) Date: Wed, 3 Feb 2016 16:08:58 +0000 Subject: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver In-Reply-To: <20160203155920.GB32546@localhost> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1452620173-4905-6-git-send-email-bharatku@xilinx.com> <8520D5D51A55D047800579B0941471982587F02E@XAP-PVEXMBX01.xlnx.xilinx.com> <20160203155920.GB32546@localhost> Message-ID: <8520D5D51A55D047800579B0941471982587F05F@XAP-PVEXMBX01.xlnx.xilinx.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org > You said you were going to do another revision, so I'm waiting for r3. Hi Bjorn, Do you have any comments on this patch (5/5), I will address other patches comments along with this patch, if any, in v3. Bharat > > > > This patch does required modifications to microblaze PCI subsystem, > > > to work with generic driver (drivers/pci/host/pcie-xilinx.c) on > > > Microblaze and Zynq. > > > > > > Signed-off-by: Bharat Kumar Gogada > > > Signed-off-by: Ravi Kiran Gummaluri > > > --- > > > Changes: > > > Modified pcibios_fixup_bus in pci-common.c, as per generic > architecuture. > > > Modified pcibios_align_resource in pci-common.c, as per generic > > > architecuture. > > > Modified pcibios_get_phb_of_node function in pci-common.c, to > remove > > > dependency on struct pci_controller. > > > Removed pci_domain_nr in pci-common.c, instead using generic code. > > > Added pcibios_add_device in pci-common.c, as per generic > architecuture. > > > Adding Kernel configuration in arch/microblaze as required for > > > generic PCI domains. > > > Added kernel configuration for driver to support Microblaze. > > > --- > > > arch/microblaze/Kconfig | 3 ++ > > > arch/microblaze/pci/pci-common.c | 61 > > > +++++++++++++++-------------------- > > > ----- > > > drivers/pci/host/Kconfig | 2 +- > > > 3 files changed, 27 insertions(+), 39 deletions(-) > > > > > > diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index > > > 0bce820..c3702b9 100644 > > > --- a/arch/microblaze/Kconfig > > > +++ b/arch/microblaze/Kconfig > > > @@ -271,6 +271,9 @@ config PCI > > > config PCI_DOMAINS > > > def_bool PCI > > > > > > +config PCI_DOMAINS_GENERIC > > > + def_bool PCI_DOMAINS > > > + > > > config PCI_SYSCALL > > > def_bool PCI > > > > > > diff --git a/arch/microblaze/pci/pci-common.c > > > b/arch/microblaze/pci/pci- common.c index ae838ed..bc72856 100644 > > > --- a/arch/microblaze/pci/pci-common.c > > > +++ b/arch/microblaze/pci/pci-common.c > > > @@ -123,17 +123,6 @@ unsigned long pci_address_to_pio(phys_addr_t > > > address) > > > } > > > EXPORT_SYMBOL_GPL(pci_address_to_pio); > > > > > > -/* > > > - * Return the domain number for this bus. > > > - */ > > > -int pci_domain_nr(struct pci_bus *bus) -{ > > > - struct pci_controller *hose = pci_bus_to_host(bus); > > > - > > > - return hose->global_number; > > > -} > > > -EXPORT_SYMBOL(pci_domain_nr); > > > - > > > /* This routine is meant to be used early during boot, when the > > > * PCI bus numbers have not yet been assigned, and you need to > > > * issue PCI config cycles to an OF device. > > > @@ -863,26 +852,10 @@ void pcibios_setup_bus_devices(struct pci_bus > > > *bus) > > > > > > void pcibios_fixup_bus(struct pci_bus *bus) { > > > - /* When called from the generic PCI probe, read PCI<->PCI bridge > > > - * bases. This is -not- called when generating the PCI tree from > > > - * the OF device-tree. > > > - */ > > > - if (bus->self != NULL) > > > - pci_read_bridge_bases(bus); > > > - > > > - /* Now fixup the bus bus */ > > > - pcibios_setup_bus_self(bus); > > > - > > > - /* Now fixup devices on that bus */ > > > - pcibios_setup_bus_devices(bus); > > > + /* nothing to do */ > > > } > > > EXPORT_SYMBOL(pcibios_fixup_bus); > > > > > > -static int skip_isa_ioresource_align(struct pci_dev *dev) -{ > > > - return 0; > > > -} > > > - > > > /* > > > * We need to avoid collisions with `mirrored' VGA ports > > > * and other strange ISA hardware, so we always want the @@ -899,20 > > > +872,20 @@ static int skip_isa_ioresource_align(struct pci_dev > > > *dev) > > > resource_size_t pcibios_align_resource(void *data, const struct > > > resource *res, > > > resource_size_t size, resource_size_t align) { > > > - struct pci_dev *dev = data; > > > resource_size_t start = res->start; > > > > > > - if (res->flags & IORESOURCE_IO) { > > > - if (skip_isa_ioresource_align(dev)) > > > - return start; > > > - if (start & 0x300) > > > - start = (start + 0x3ff) & ~0x3ff; > > > - } > > > - > > > return start; > > > } > > > EXPORT_SYMBOL(pcibios_align_resource); > > > > > > +int pcibios_add_device(struct pci_dev *dev) { > > > + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); > > > + > > > + return 0; > > > +} > > > +EXPORT_SYMBOL(pcibios_add_device); > > > + > > > /* > > > * Reparent resource children of pr that conflict with res > > > * under res, and make res replace those children. > > > @@ -1335,9 +1308,21 @@ static void > > > pcibios_setup_phb_resources(struct > > > pci_controller *hose, > > > > > > struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) { > > > - struct pci_controller *hose = bus->sysdata; > > > + struct device_node *np; > > > + > > > + for_each_node_by_type(np, "pci") { > > > + const void *prop; > > > + unsigned int bus_min; > > > + > > > + prop = of_get_property(np, "bus-range", NULL); > > > + if (!prop) > > > + continue; > > > + bus_min = be32_to_cpup(prop); > > > + if (bus->number == bus_min) > > > + return np; > > > + } > > > > > > - return of_node_get(hose->dn); > > > + return NULL; > > > } > > > > > > static void pcibios_scan_phb(struct pci_controller *hose) diff > > > --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig index > > > d5e58ba..7c56c2e 100644 > > > --- a/drivers/pci/host/Kconfig > > > +++ b/drivers/pci/host/Kconfig > > > @@ -79,7 +79,7 @@ config PCI_KEYSTONE > > > > > > config PCIE_XILINX > > > bool "Xilinx AXI PCIe host bridge support" > > > - depends on ARCH_ZYNQ > > > + depends on ARCH_ZYNQ || MICROBLAZE > > > help > > > Say 'Y' here if you want kernel to support the Xilinx AXI PCIe > > > Host Bridge driver. > > > -- > > > 2.1.1 > > > > -- > > To unsubscribe from this list: send the line "unsubscribe linux-pci" > > in the body of a message to majordomo at vger.kernel.org More > majordomo > > info at http://vger.kernel.org/majordomo-info.html