From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757867AbcBDFta (ORCPT ); Thu, 4 Feb 2016 00:49:30 -0500 Received: from mail-bl2nam02on0072.outbound.protection.outlook.com ([104.47.38.72]:23584 "EHLO NAM02-BL2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755711AbcBDFt1 convert rfc822-to-8bit (ORCPT ); Thu, 4 Feb 2016 00:49:27 -0500 Authentication-Results: spf=pass (sender IP is 149.199.60.100) smtp.mailfrom=xilinx.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=bestguesspass action=none header.from=xilinx.com; From: Bharat Kumar Gogada To: Bjorn Helgaas CC: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "arnd@arndb.de" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri , Benjamin Herrenschmidt Subject: RE: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Thread-Topic: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Thread-Index: AQHRTV/WidMO9SZdZ0qxspjCfwADM58aH/yAgAABqoCAAWL1UA== Date: Thu, 4 Feb 2016 05:49:20 +0000 Message-ID: <8520D5D51A55D047800579B0941471982587F199@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1452620173-4905-6-git-send-email-bharatku@xilinx.com> <20160203163207.GC32546@localhost> <20160203163805.GA6112@localhost> In-Reply-To: <20160203163805.GA6112@localhost> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.23.96.57] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22108.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(2980300002)(438002)(189002)(24454002)(199003)(92566002)(4326007)(47776003)(5008740100001)(55846006)(19580405001)(106116001)(87936001)(76176999)(1220700001)(586003)(86362001)(63266004)(2906002)(5004730100002)(93886004)(97756001)(46406003)(5003600100002)(1096002)(23726003)(6116002)(50466002)(19580395003)(3846002)(2900100001)(102836003)(2950100001)(54356999)(106466001)(2920100001)(33656002)(6806005)(189998001)(5250100002)(110136002)(5001960100002)(50986999)(11100500001)(41533002)(107986001);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1NAM02HT175;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;MLV:sfv;MX:1;A:1;LANG:en; X-MS-Office365-Filtering-Correlation-Id: f5f45990-1933-4662-c391-08d32d26f041 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(8251501002);SRVR:CY1NAM02HT175; X-Microsoft-Antispam-PRVS: <1f4bb3a81f5f4d2ebde68ef96d37a804@CY1NAM02HT175.eop-nam02.prod.protection.outlook.com> X-Exchange-Antispam-Report-Test: UriScan:(192813158149592); X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(2401047)(13015025)(13017025)(13024025)(8121501046)(13023025)(13018025)(5005006)(10201501046)(3002001);SRVR:CY1NAM02HT175;BCL:0;PCL:0;RULEID:;SRVR:CY1NAM02HT175; X-Forefront-PRVS: 084285FC5C X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2016 05:49:24.1908 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.100];Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1NAM02HT175 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Subject: Re: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem > to support generic Xilinx AXI PCIe Host Bridge IP driver > > [+cc Ben for real this time] > > On Wed, Feb 03, 2016 at 10:32:07AM -0600, Bjorn Helgaas wrote: > > [+cc Ben, pcibios_get_phb_of_node() question] > > > > On Tue, Jan 12, 2016 at 11:06:13PM +0530, Bharat Kumar Gogada wrote: > > > This patch does required modifications to microblaze PCI subsystem, > > > to work with generic driver (drivers/pci/host/pcie-xilinx.c) on > > > Microblaze and Zynq. > > > > > > Signed-off-by: Bharat Kumar Gogada > > > Signed-off-by: Ravi Kiran Gummaluri ... > > > > > resource_size_t pcibios_align_resource(void *data, const struct resource > *res, > > > resource_size_t size, resource_size_t align) { > > > - struct pci_dev *dev = data; > > > resource_size_t start = res->start; > > > > > > - if (res->flags & IORESOURCE_IO) { > > > - if (skip_isa_ioresource_align(dev)) > > > - return start; > > > - if (start & 0x300) > > > - start = (start + 0x3ff) & ~0x3ff; > > > - } > > > - > > > return start; > > > > "return res->start;" is sufficient; no need for a temporary variable. > > Agreed will address in next patch. > > > } > > > EXPORT_SYMBOL(pcibios_align_resource); > > > > > > +int pcibios_add_device(struct pci_dev *dev) { > > > + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); > > > + > > > + return 0; > > > +} > > > +EXPORT_SYMBOL(pcibios_add_device); > > > + > > > /* > > > * Reparent resource children of pr that conflict with res > > > * under res, and make res replace those children. > > > @@ -1335,9 +1308,21 @@ static void > > > pcibios_setup_phb_resources(struct pci_controller *hose, > > > > > > struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) { > > > - struct pci_controller *hose = bus->sysdata; > > > + struct device_node *np; > > > + > > > + for_each_node_by_type(np, "pci") { > > > + const void *prop; > > > + unsigned int bus_min; > > > + > > > + prop = of_get_property(np, "bus-range", NULL); > > > + if (!prop) > > > + continue; > > > + bus_min = be32_to_cpup(prop); > > > + if (bus->number == bus_min) > > > + return np; > > > + } > > > > > > - return of_node_get(hose->dn); > > > + return NULL; > > > > Hmmm. The old microblaze code ("return of_node_get(hose->dn);") is > > basically the same as the mips and powerpc versions. The new code is > > basically the same as the x86 version. > > > > I like the generic weak version in drivers/pci/of.c because it doesn't > > use any arch-specific data, and it looks like if we just set the > > struct device.of_node members correctly, everything should Just Work. > > > > But Ben added both the generic and the x86 versions the same day, so > > there must be some complication: > > > > 98d9f30c820d ("pci/of: Match PCI devices to OF nodes dynamically") > > 3d5fe5a65af9 ("x86/devicetree: Use generic PCI <-> OF matching") > > > > So I guess my question is, why do we need a microblaze-specific > > version at all? > > I did not notice the weak version in /pci/of.c, I have tested with weak version also and it is working. We might not need this microblaze specific version, but will wait for ben's reply. Bharat From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bharat Kumar Gogada Subject: RE: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Date: Thu, 4 Feb 2016 05:49:20 +0000 Message-ID: <8520D5D51A55D047800579B0941471982587F199@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1452620173-4905-6-git-send-email-bharatku@xilinx.com> <20160203163207.GC32546@localhost> <20160203163805.GA6112@localhost> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT Return-path: In-Reply-To: <20160203163805.GA6112@localhost> Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org To: Bjorn Helgaas Cc: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "arnd@arndb.de" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" "linux-kernel@vger.kernel.org" List-Id: devicetree@vger.kernel.org > Subject: Re: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem > to support generic Xilinx AXI PCIe Host Bridge IP driver > > [+cc Ben for real this time] > > On Wed, Feb 03, 2016 at 10:32:07AM -0600, Bjorn Helgaas wrote: > > [+cc Ben, pcibios_get_phb_of_node() question] > > > > On Tue, Jan 12, 2016 at 11:06:13PM +0530, Bharat Kumar Gogada wrote: > > > This patch does required modifications to microblaze PCI subsystem, > > > to work with generic driver (drivers/pci/host/pcie-xilinx.c) on > > > Microblaze and Zynq. > > > > > > Signed-off-by: Bharat Kumar Gogada > > > Signed-off-by: Ravi Kiran Gummaluri ... > > > > > resource_size_t pcibios_align_resource(void *data, const struct resource > *res, > > > resource_size_t size, resource_size_t align) { > > > - struct pci_dev *dev = data; > > > resource_size_t start = res->start; > > > > > > - if (res->flags & IORESOURCE_IO) { > > > - if (skip_isa_ioresource_align(dev)) > > > - return start; > > > - if (start & 0x300) > > > - start = (start + 0x3ff) & ~0x3ff; > > > - } > > > - > > > return start; > > > > "return res->start;" is sufficient; no need for a temporary variable. > > Agreed will address in next patch. > > > } > > > EXPORT_SYMBOL(pcibios_align_resource); > > > > > > +int pcibios_add_device(struct pci_dev *dev) { > > > + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); > > > + > > > + return 0; > > > +} > > > +EXPORT_SYMBOL(pcibios_add_device); > > > + > > > /* > > > * Reparent resource children of pr that conflict with res > > > * under res, and make res replace those children. > > > @@ -1335,9 +1308,21 @@ static void > > > pcibios_setup_phb_resources(struct pci_controller *hose, > > > > > > struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) { > > > - struct pci_controller *hose = bus->sysdata; > > > + struct device_node *np; > > > + > > > + for_each_node_by_type(np, "pci") { > > > + const void *prop; > > > + unsigned int bus_min; > > > + > > > + prop = of_get_property(np, "bus-range", NULL); > > > + if (!prop) > > > + continue; > > > + bus_min = be32_to_cpup(prop); > > > + if (bus->number == bus_min) > > > + return np; > > > + } > > > > > > - return of_node_get(hose->dn); > > > + return NULL; > > > > Hmmm. The old microblaze code ("return of_node_get(hose->dn);") is > > basically the same as the mips and powerpc versions. The new code is > > basically the same as the x86 version. > > > > I like the generic weak version in drivers/pci/of.c because it doesn't > > use any arch-specific data, and it looks like if we just set the > > struct device.of_node members correctly, everything should Just Work. > > > > But Ben added both the generic and the x86 versions the same day, so > > there must be some complication: > > > > 98d9f30c820d ("pci/of: Match PCI devices to OF nodes dynamically") > > 3d5fe5a65af9 ("x86/devicetree: Use generic PCI <-> OF matching") > > > > So I guess my question is, why do we need a microblaze-specific > > version at all? > > I did not notice the weak version in /pci/of.c, I have tested with weak version also and it is working. We might not need this microblaze specific version, but will wait for ben's reply. Bharat From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Bharat Kumar Gogada To: Bjorn Helgaas CC: "bhelgaas@google.com" , Michal Simek , "lorenzo.pieralisi@arm.com" , "paul.burton@imgtec.com" , "yinghai@kernel.org" , "wangyijing@huawei.com" , "robh@kernel.org" , "russell.joyce@york.ac.uk" , Soren Brinkmann , "jiang.liu@linux.intel.com" , "arnd@arndb.de" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "ijc+devicetree@hellion.org.uk" , "galak@codeaurora.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ravikiran Gummaluri , Benjamin Herrenschmidt Subject: RE: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver Date: Thu, 4 Feb 2016 05:49:20 +0000 Message-ID: <8520D5D51A55D047800579B0941471982587F199@XAP-PVEXMBX01.xlnx.xilinx.com> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1452620173-4905-6-git-send-email-bharatku@xilinx.com> <20160203163207.GC32546@localhost> <20160203163805.GA6112@localhost> In-Reply-To: <20160203163805.GA6112@localhost> Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: > Subject: Re: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem > to support generic Xilinx AXI PCIe Host Bridge IP driver > > [+cc Ben for real this time] > > On Wed, Feb 03, 2016 at 10:32:07AM -0600, Bjorn Helgaas wrote: > > [+cc Ben, pcibios_get_phb_of_node() question] > > > > On Tue, Jan 12, 2016 at 11:06:13PM +0530, Bharat Kumar Gogada wrote: > > > This patch does required modifications to microblaze PCI subsystem, > > > to work with generic driver (drivers/pci/host/pcie-xilinx.c) on > > > Microblaze and Zynq. > > > > > > Signed-off-by: Bharat Kumar Gogada > > > Signed-off-by: Ravi Kiran Gummaluri ... > > > > > resource_size_t pcibios_align_resource(void *data, const struct resource > *res, > > > resource_size_t size, resource_size_t align) { > > > - struct pci_dev *dev = data; > > > resource_size_t start = res->start; > > > > > > - if (res->flags & IORESOURCE_IO) { > > > - if (skip_isa_ioresource_align(dev)) > > > - return start; > > > - if (start & 0x300) > > > - start = (start + 0x3ff) & ~0x3ff; > > > - } > > > - > > > return start; > > > > "return res->start;" is sufficient; no need for a temporary variable. > > Agreed will address in next patch. > > > } > > > EXPORT_SYMBOL(pcibios_align_resource); > > > > > > +int pcibios_add_device(struct pci_dev *dev) { > > > + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); > > > + > > > + return 0; > > > +} > > > +EXPORT_SYMBOL(pcibios_add_device); > > > + > > > /* > > > * Reparent resource children of pr that conflict with res > > > * under res, and make res replace those children. > > > @@ -1335,9 +1308,21 @@ static void > > > pcibios_setup_phb_resources(struct pci_controller *hose, > > > > > > struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) { > > > - struct pci_controller *hose = bus->sysdata; > > > + struct device_node *np; > > > + > > > + for_each_node_by_type(np, "pci") { > > > + const void *prop; > > > + unsigned int bus_min; > > > + > > > + prop = of_get_property(np, "bus-range", NULL); > > > + if (!prop) > > > + continue; > > > + bus_min = be32_to_cpup(prop); > > > + if (bus->number == bus_min) > > > + return np; > > > + } > > > > > > - return of_node_get(hose->dn); > > > + return NULL; > > > > Hmmm. The old microblaze code ("return of_node_get(hose->dn);") is > > basically the same as the mips and powerpc versions. The new code is > > basically the same as the x86 version. > > > > I like the generic weak version in drivers/pci/of.c because it doesn't > > use any arch-specific data, and it looks like if we just set the > > struct device.of_node members correctly, everything should Just Work. > > > > But Ben added both the generic and the x86 versions the same day, so > > there must be some complication: > > > > 98d9f30c820d ("pci/of: Match PCI devices to OF nodes dynamically") > > 3d5fe5a65af9 ("x86/devicetree: Use generic PCI <-> OF matching") > > > > So I guess my question is, why do we need a microblaze-specific > > version at all? > > I did not notice the weak version in /pci/of.c, I have tested with weak version also and it is working. We might not need this microblaze specific version, but will wait for ben's reply. Bharat From mboxrd@z Thu Jan 1 00:00:00 1970 From: bharat.kumar.gogada@xilinx.com (Bharat Kumar Gogada) Date: Thu, 4 Feb 2016 05:49:20 +0000 Subject: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem to support generic Xilinx AXI PCIe Host Bridge IP driver In-Reply-To: <20160203163805.GA6112@localhost> References: <1452620173-4905-1-git-send-email-bharatku@xilinx.com> <1452620173-4905-6-git-send-email-bharatku@xilinx.com> <20160203163207.GC32546@localhost> <20160203163805.GA6112@localhost> Message-ID: <8520D5D51A55D047800579B0941471982587F199@XAP-PVEXMBX01.xlnx.xilinx.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org > Subject: Re: [PATCH V2 5/5] Microblaze: Modifying microblaze PCI subsytem > to support generic Xilinx AXI PCIe Host Bridge IP driver > > [+cc Ben for real this time] > > On Wed, Feb 03, 2016 at 10:32:07AM -0600, Bjorn Helgaas wrote: > > [+cc Ben, pcibios_get_phb_of_node() question] > > > > On Tue, Jan 12, 2016 at 11:06:13PM +0530, Bharat Kumar Gogada wrote: > > > This patch does required modifications to microblaze PCI subsystem, > > > to work with generic driver (drivers/pci/host/pcie-xilinx.c) on > > > Microblaze and Zynq. > > > > > > Signed-off-by: Bharat Kumar Gogada > > > Signed-off-by: Ravi Kiran Gummaluri ... > > > > > resource_size_t pcibios_align_resource(void *data, const struct resource > *res, > > > resource_size_t size, resource_size_t align) { > > > - struct pci_dev *dev = data; > > > resource_size_t start = res->start; > > > > > > - if (res->flags & IORESOURCE_IO) { > > > - if (skip_isa_ioresource_align(dev)) > > > - return start; > > > - if (start & 0x300) > > > - start = (start + 0x3ff) & ~0x3ff; > > > - } > > > - > > > return start; > > > > "return res->start;" is sufficient; no need for a temporary variable. > > Agreed will address in next patch. > > > } > > > EXPORT_SYMBOL(pcibios_align_resource); > > > > > > +int pcibios_add_device(struct pci_dev *dev) { > > > + dev->irq = of_irq_parse_and_map_pci(dev, 0, 0); > > > + > > > + return 0; > > > +} > > > +EXPORT_SYMBOL(pcibios_add_device); > > > + > > > /* > > > * Reparent resource children of pr that conflict with res > > > * under res, and make res replace those children. > > > @@ -1335,9 +1308,21 @@ static void > > > pcibios_setup_phb_resources(struct pci_controller *hose, > > > > > > struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) { > > > - struct pci_controller *hose = bus->sysdata; > > > + struct device_node *np; > > > + > > > + for_each_node_by_type(np, "pci") { > > > + const void *prop; > > > + unsigned int bus_min; > > > + > > > + prop = of_get_property(np, "bus-range", NULL); > > > + if (!prop) > > > + continue; > > > + bus_min = be32_to_cpup(prop); > > > + if (bus->number == bus_min) > > > + return np; > > > + } > > > > > > - return of_node_get(hose->dn); > > > + return NULL; > > > > Hmmm. The old microblaze code ("return of_node_get(hose->dn);") is > > basically the same as the mips and powerpc versions. The new code is > > basically the same as the x86 version. > > > > I like the generic weak version in drivers/pci/of.c because it doesn't > > use any arch-specific data, and it looks like if we just set the > > struct device.of_node members correctly, everything should Just Work. > > > > But Ben added both the generic and the x86 versions the same day, so > > there must be some complication: > > > > 98d9f30c820d ("pci/of: Match PCI devices to OF nodes dynamically") > > 3d5fe5a65af9 ("x86/devicetree: Use generic PCI <-> OF matching") > > > > So I guess my question is, why do we need a microblaze-specific > > version at all? > > I did not notice the weak version in /pci/of.c, I have tested with weak version also and it is working. We might not need this microblaze specific version, but will wait for ben's reply. Bharat