diff for duplicates of <8520D5D51A55D047800579B094147198258D2C99@XAP-PVEXMBX01.xlnx.xilinx.com>

diff --git a/a/1.txt b/N1/1.txt
index e44940a..6818fb8 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -4,10 +4,12 @@
 > >>>> *pcie)
 > >>>>>     }
 > >>>>>
-> >>>>>     pcie->legacy_irq_domain = irq_domain_add_linear(legacy_intc_node,
+> >>>>>     pcie->legacy_irq_domain =3D irq_domain_add_linear(legacy_intc_n=
+ode,
 > >>>>> -                                                   INTX_NUM,
 > >>>>> +                                                   INTX_NUM + 1,
-> >>>>>                                                     &legacy_domain_ops,
+> >>>>>                                                     &legacy_domain_=
+ops,
 > >>>>>                                                     pcie);
 > >>>>
 > >>>> This feels like the wrong thing to do. You have INTX_NUM irqs, so
@@ -43,20 +45,24 @@
 > >>>
 > >>> In kernel/irq/irqdomain.c function irq_domain_associate
 > >>>
-> >>> if (WARN(hwirq >= domain->hwirq_max,
-> >>>                  "error: hwirq 0x%x is too large for %s\n", (int)hwirq, domain-
+> >>> if (WARN(hwirq >=3D domain->hwirq_max,
+> >>>                  "error: hwirq 0x%x is too large for %s\n", (int)hwir=
+q, domain-
 > >name))
 > >>>                 return -EINVAL;
 > >>>
 > >>> Here the hwirq and hwirq_max are equal to 4 without the above
 > >>> condition
 > >> (INTX_NUM + 1) due to which crash is coming.
-> >>> This is happening as the legacy interrupts are starting from 1 (INTA).
+> >>> This is happening as the legacy interrupts are starting from 1 (INTA)=
+.
 > >>
-> >> I understood that. I'm still persisting in saying that you have the wrong fix.
+> >> I understood that. I'm still persisting in saying that you have the wr=
+ong fix.
 > >>
 > >> Your domain should always allocate many interrupts as you have
-> >> interrupt sources. These interrupts (hwirq) should be numbered from 0 to (n-
+> >> interrupt sources. These interrupts (hwirq) should be numbered from 0 =
+to (n-
 > 1).
 > >
 > > Agreed, but here comes the problem the hwirq for legacy interrupts
@@ -64,22 +70,35 @@
 > > PCIe specification for legacy interrupts. So these cannot be numbered
 > > from 0. So when 0x4 (INTD) for a multi-function device comes the crash
 > > occurs.
-> 
-> So who provides this hwirq? Who calls irq_domain_associate() with hwirq set to
+>=20
+> So who provides this hwirq? Who calls irq_domain_associate() with hwirq s=
+et to
 > 4?
-> 
-PCIe subsystem invokes pcibios_add_device function in arch/arm64/kernel/pci.c for every pci device.
-The purpose of this function is to assign dev->irq using of_irq_parse_and_map_pci.
-of_irq_parse_and_map_pci invokes of_irq_parse_pci where it reads PCI_INTERRUPT_PIN from configuration space and saves it
+>=20
+PCIe subsystem invokes pcibios_add_device function in arch/arm64/kernel/pci=
+.c for every pci device.
+The purpose of this function is to assign dev->irq using of_irq_parse_and_m=
+ap_pci.
+of_irq_parse_and_map_pci invokes of_irq_parse_pci where it reads PCI_INTERR=
+UPT_PIN from configuration space and saves it
 in parameter of struct of_phandle_args.
-This structure is passed to irq_create_of_mapping where it invokes irq_create_fwspec_mapping.
-irq_create_fwspec_mapping invokes irq_domain_translate and gets hwirq, here the above saved PCI_INTERRUPT_PIN value is assigned 
-to hwirq (*hwirq = fwspec->param[0]).
-And then using this hwirq irq_create_mapping -> irq_domain_associate were invoked and mapping is created for virtual irq with this hwirq.
-So for any end point PCI_INTERRUPT_PIN value starts from 0x1 to 0x4 and so hwirq starts from 0x1 to 0x4.
+This structure is passed to irq_create_of_mapping where it invokes irq_crea=
+te_fwspec_mapping.
+irq_create_fwspec_mapping invokes irq_domain_translate and gets hwirq, here=
+ the above saved PCI_INTERRUPT_PIN value is assigned=20
+to hwirq (*hwirq =3D fwspec->param[0]).
+And then using this hwirq irq_create_mapping -> irq_domain_associate were i=
+nvoked and mapping is created for virtual irq with this hwirq.
+So for any end point PCI_INTERRUPT_PIN value starts from 0x1 to 0x4 and so =
+hwirq starts from 0x1 to 0x4.
 
-So the values are more generic w.r.t to protocol, that's why hwirq will range from 0x1 to 0x4. 
-And then if you check pcie-altera.c they are doing this adding one in their handler and while creating legacy domain.
- 
+So the values are more generic w.r.t to protocol, that's why hwirq will ran=
+ge from 0x1 to 0x4.=20
+And then if you check pcie-altera.c they are doing this adding one in their=
+ handler and while creating legacy domain.
+=20
 Thanks & Regards,
-Bharat
\ No newline at end of file
+Bharat
+=20
+
+=20
\ No newline at end of file
diff --git a/a/content_digest b/N1/content_digest
index bed741b..225b4f4 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -56,10 +56,12 @@
   "> >>>> *pcie)\n",
   "> >>>>>     }\n",
   "> >>>>>\n",
-  "> >>>>>     pcie->legacy_irq_domain = irq_domain_add_linear(legacy_intc_node,\n",
+  "> >>>>>     pcie->legacy_irq_domain =3D irq_domain_add_linear(legacy_intc_n=\n",
+  "ode,\n",
   "> >>>>> -                                                   INTX_NUM,\n",
   "> >>>>> +                                                   INTX_NUM + 1,\n",
-  "> >>>>>                                                     &legacy_domain_ops,\n",
+  "> >>>>>                                                     &legacy_domain_=\n",
+  "ops,\n",
   "> >>>>>                                                     pcie);\n",
   "> >>>>\n",
   "> >>>> This feels like the wrong thing to do. You have INTX_NUM irqs, so\n",
@@ -95,20 +97,24 @@
   "> >>>\n",
   "> >>> In kernel/irq/irqdomain.c function irq_domain_associate\n",
   "> >>>\n",
-  "> >>> if (WARN(hwirq >= domain->hwirq_max,\n",
-  "> >>>                  \"error: hwirq 0x%x is too large for %s\\n\", (int)hwirq, domain-\n",
+  "> >>> if (WARN(hwirq >=3D domain->hwirq_max,\n",
+  "> >>>                  \"error: hwirq 0x%x is too large for %s\\n\", (int)hwir=\n",
+  "q, domain-\n",
   "> >name))\n",
   "> >>>                 return -EINVAL;\n",
   "> >>>\n",
   "> >>> Here the hwirq and hwirq_max are equal to 4 without the above\n",
   "> >>> condition\n",
   "> >> (INTX_NUM + 1) due to which crash is coming.\n",
-  "> >>> This is happening as the legacy interrupts are starting from 1 (INTA).\n",
+  "> >>> This is happening as the legacy interrupts are starting from 1 (INTA)=\n",
+  ".\n",
   "> >>\n",
-  "> >> I understood that. I'm still persisting in saying that you have the wrong fix.\n",
+  "> >> I understood that. I'm still persisting in saying that you have the wr=\n",
+  "ong fix.\n",
   "> >>\n",
   "> >> Your domain should always allocate many interrupts as you have\n",
-  "> >> interrupt sources. These interrupts (hwirq) should be numbered from 0 to (n-\n",
+  "> >> interrupt sources. These interrupts (hwirq) should be numbered from 0 =\n",
+  "to (n-\n",
   "> 1).\n",
   "> >\n",
   "> > Agreed, but here comes the problem the hwirq for legacy interrupts\n",
@@ -116,25 +122,38 @@
   "> > PCIe specification for legacy interrupts. So these cannot be numbered\n",
   "> > from 0. So when 0x4 (INTD) for a multi-function device comes the crash\n",
   "> > occurs.\n",
-  "> \n",
-  "> So who provides this hwirq? Who calls irq_domain_associate() with hwirq set to\n",
+  ">=20\n",
+  "> So who provides this hwirq? Who calls irq_domain_associate() with hwirq s=\n",
+  "et to\n",
   "> 4?\n",
-  "> \n",
-  "PCIe subsystem invokes pcibios_add_device function in arch/arm64/kernel/pci.c for every pci device.\n",
-  "The purpose of this function is to assign dev->irq using of_irq_parse_and_map_pci.\n",
-  "of_irq_parse_and_map_pci invokes of_irq_parse_pci where it reads PCI_INTERRUPT_PIN from configuration space and saves it\n",
+  ">=20\n",
+  "PCIe subsystem invokes pcibios_add_device function in arch/arm64/kernel/pci=\n",
+  ".c for every pci device.\n",
+  "The purpose of this function is to assign dev->irq using of_irq_parse_and_m=\n",
+  "ap_pci.\n",
+  "of_irq_parse_and_map_pci invokes of_irq_parse_pci where it reads PCI_INTERR=\n",
+  "UPT_PIN from configuration space and saves it\n",
   "in parameter of struct of_phandle_args.\n",
-  "This structure is passed to irq_create_of_mapping where it invokes irq_create_fwspec_mapping.\n",
-  "irq_create_fwspec_mapping invokes irq_domain_translate and gets hwirq, here the above saved PCI_INTERRUPT_PIN value is assigned \n",
-  "to hwirq (*hwirq = fwspec->param[0]).\n",
-  "And then using this hwirq irq_create_mapping -> irq_domain_associate were invoked and mapping is created for virtual irq with this hwirq.\n",
-  "So for any end point PCI_INTERRUPT_PIN value starts from 0x1 to 0x4 and so hwirq starts from 0x1 to 0x4.\n",
+  "This structure is passed to irq_create_of_mapping where it invokes irq_crea=\n",
+  "te_fwspec_mapping.\n",
+  "irq_create_fwspec_mapping invokes irq_domain_translate and gets hwirq, here=\n",
+  " the above saved PCI_INTERRUPT_PIN value is assigned=20\n",
+  "to hwirq (*hwirq =3D fwspec->param[0]).\n",
+  "And then using this hwirq irq_create_mapping -> irq_domain_associate were i=\n",
+  "nvoked and mapping is created for virtual irq with this hwirq.\n",
+  "So for any end point PCI_INTERRUPT_PIN value starts from 0x1 to 0x4 and so =\n",
+  "hwirq starts from 0x1 to 0x4.\n",
   "\n",
-  "So the values are more generic w.r.t to protocol, that's why hwirq will range from 0x1 to 0x4. \n",
-  "And then if you check pcie-altera.c they are doing this adding one in their handler and while creating legacy domain.\n",
-  " \n",
+  "So the values are more generic w.r.t to protocol, that's why hwirq will ran=\n",
+  "ge from 0x1 to 0x4.=20\n",
+  "And then if you check pcie-altera.c they are doing this adding one in their=\n",
+  " handler and while creating legacy domain.\n",
+  "=20\n",
   "Thanks & Regards,\n",
-  "Bharat"
+  "Bharat\n",
+  "=20\n",
+  "\n",
+  "=20"
 ]
 
-4ff916e10e0e53d83d1054c59a2a52b2cf2962fc15d96fd52ddeac3de7310763
+4657ee144b4011c37b3cd1acdcd2b13b7d865f93b43ebd4a09d3f265db6ea0ab
