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* [PATCH 1/3] PCI: Xilinx NWL PCIe: Expanding PCIe core errors and printing event occurred.
@ 2016-08-30 10:39 ` Bharat Kumar Gogada
  0 siblings, 0 replies; 58+ messages in thread
From: Bharat Kumar Gogada @ 2016-08-30 10:39 UTC (permalink / raw)
  To: robh, bhelgaas, colin.king, soren.brinkmann, marc.zyngier,
	michal.simek, arnd
  Cc: linux-arm-kernel, linux-pci, linux-kernel, rgummal, Bharat Kumar Gogada

The current driver prints pcie core error, for all core events.
Instead of just printing PCIe core error, now adding prints to show
individual core events occurred.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
---
 drivers/pci/host/pcie-xilinx-nwl.c | 48 +++++++++++++++++++++++++++++++-------
 1 file changed, 40 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c
index 3479d30..86c1834 100644
--- a/drivers/pci/host/pcie-xilinx-nwl.c
+++ b/drivers/pci/host/pcie-xilinx-nwl.c
@@ -85,10 +85,15 @@
 #define MSGF_MISC_SR_MASTER_ERR		BIT(5)
 #define MSGF_MISC_SR_I_ADDR_ERR		BIT(6)
 #define MSGF_MISC_SR_E_ADDR_ERR		BIT(7)
-#define MSGF_MISC_SR_UR_DETECT          BIT(20)
-
-#define MSGF_MISC_SR_PCIE_CORE		GENMASK(18, 16)
-#define MSGF_MISC_SR_PCIE_CORE_ERR	GENMASK(31, 22)
+#define MSGF_MISC_SR_FATAL_AER		BIT(16)
+#define MSGF_MISC_SR_NON_FATAL_AER	BIT(17)
+#define MSGF_MISC_SR_CORR_AER		BIT(18)
+#define MSGF_MISC_SR_UR_DETECT		BIT(20)
+#define MSGF_MISC_SR_NON_FATAL_DEV	BIT(22)
+#define MSGF_MISC_SR_FATAL_DEV		BIT(23)
+#define MSGF_MISC_SR_LINK_DOWN		BIT(24)
+#define MSGF_MSIC_SR_LINK_AUTO_BWIDTH	BIT(25)
+#define MSGF_MSIC_SR_LINK_BWIDTH	BIT(26)
 
 #define MSGF_MISC_SR_MASKALL		(MSGF_MISC_SR_RXMSG_AVAIL | \
 					MSGF_MISC_SR_RXMSG_OVER | \
@@ -96,9 +101,15 @@
 					MSGF_MISC_SR_MASTER_ERR | \
 					MSGF_MISC_SR_I_ADDR_ERR | \
 					MSGF_MISC_SR_E_ADDR_ERR | \
+					MSGF_MISC_SR_FATAL_AER | \
+					MSGF_MISC_SR_NON_FATAL_AER | \
+					MSGF_MISC_SR_CORR_AER | \
 					MSGF_MISC_SR_UR_DETECT | \
-					MSGF_MISC_SR_PCIE_CORE | \
-					MSGF_MISC_SR_PCIE_CORE_ERR)
+					MSGF_MISC_SR_NON_FATAL_DEV | \
+					MSGF_MISC_SR_FATAL_DEV | \
+					MSGF_MISC_SR_LINK_DOWN | \
+					MSGF_MSIC_SR_LINK_AUTO_BWIDTH | \
+					MSGF_MSIC_SR_LINK_BWIDTH)
 
 /* Legacy interrupt status mask bits */
 #define MSGF_LEG_SR_INTA		BIT(0)
@@ -291,8 +302,29 @@ static irqreturn_t nwl_pcie_misc_handler(int irq, void *data)
 		dev_err(pcie->dev,
 			"In Misc Egress address translation error\n");
 
-	if (misc_stat & MSGF_MISC_SR_PCIE_CORE_ERR)
-		dev_err(pcie->dev, "PCIe Core error\n");
+	if (misc_stat & MSGF_MISC_SR_FATAL_AER)
+		dev_err(pcie->dev, "Fatal Error in AER Capability\n");
+
+	if (misc_stat & MSGF_MISC_SR_NON_FATAL_AER)
+		dev_err(pcie->dev, "Non-Fatal Error in AER Capability\n");
+
+	if (misc_stat & MSGF_MISC_SR_CORR_AER)
+		dev_err(pcie->dev, "Correctable Error in AER Capability\n");
+
+	if (misc_stat & MSGF_MISC_SR_UR_DETECT)
+		dev_err(pcie->dev, "Unsupported request Detected\n");
+
+	if (misc_stat & MSGF_MISC_SR_NON_FATAL_DEV)
+		dev_err(pcie->dev, "Non-Fatal Error Detected\n");
+
+	if (misc_stat & MSGF_MISC_SR_FATAL_DEV)
+		dev_err(pcie->dev, "Fatal Error Detected\n");
+
+	if (misc_stat & MSGF_MSIC_SR_LINK_AUTO_BWIDTH)
+		dev_info(pcie->dev, "Link Autonomous Bandwidth Management Status bit set\n");
+
+	if (misc_stat & MSGF_MSIC_SR_LINK_BWIDTH)
+		dev_info(pcie->dev, "Link Bandwidth Management Status bit set\n");
 
 	/* Clear misc interrupt status */
 	nwl_bridge_writel(pcie, misc_stat, MSGF_MISC_STATUS);
-- 
2.1.1

^ permalink raw reply related	[flat|nested] 58+ messages in thread

end of thread, other threads:[~2017-03-02  8:46 UTC | newest]

Thread overview: 58+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-08-30 10:39 [PATCH 1/3] PCI: Xilinx NWL PCIe: Expanding PCIe core errors and printing event occurred Bharat Kumar Gogada
2016-08-30 10:39 ` Bharat Kumar Gogada
2016-08-30 10:39 ` [PATCH 2/3] PCI: Xilinx NWL PCIe: Enabling all MSI interrupts using MSI mask Bharat Kumar Gogada
2016-08-30 10:39   ` Bharat Kumar Gogada
2016-08-30 10:39   ` Bharat Kumar Gogada
2016-08-30 10:39 ` [PATCH 3/3] PCI: Xilinx NWL PCIe: Fix Error for multi function device for legacy interrupts Bharat Kumar Gogada
2016-08-30 10:39   ` Bharat Kumar Gogada
2016-08-30 12:17   ` Marc Zyngier
2016-08-30 12:17     ` Marc Zyngier
2016-08-30 14:13     ` Bharat Kumar Gogada
2016-08-30 14:13       ` Bharat Kumar Gogada
2016-08-30 14:13       ` Bharat Kumar Gogada
2016-08-30 15:02       ` Marc Zyngier
2016-08-30 15:02         ` Marc Zyngier
2016-08-30 15:02         ` Marc Zyngier
2016-08-31  9:56         ` Bharat Kumar Gogada
2016-08-31  9:56           ` Bharat Kumar Gogada
2016-08-31  9:56           ` Bharat Kumar Gogada
2016-08-31 10:56           ` Marc Zyngier
2016-08-31 10:56             ` Marc Zyngier
2016-08-31 10:56             ` Marc Zyngier
2016-09-01  5:19             ` Bharat Kumar Gogada
2016-09-01  5:19               ` Bharat Kumar Gogada
2016-09-01  5:19               ` Bharat Kumar Gogada
2016-09-12 22:02               ` Bjorn Helgaas
2016-09-12 22:02                 ` Bjorn Helgaas
2016-09-12 22:02                 ` Bjorn Helgaas
2016-09-13  7:41                 ` Marc Zyngier
2016-09-13  7:41                   ` Marc Zyngier
2016-09-13  7:41                   ` Marc Zyngier
2016-09-13 15:05                   ` Bjorn Helgaas
2016-09-13 15:05                     ` Bjorn Helgaas
2016-09-13 15:05                     ` Bjorn Helgaas
2016-09-13 15:34                     ` Bjorn Helgaas
2016-09-13 15:34                       ` Bjorn Helgaas
2016-09-13 15:34                       ` Bjorn Helgaas
2016-09-13 15:50                       ` Thomas Petazzoni
2016-09-13 15:50                         ` Thomas Petazzoni
2016-09-13 15:50                         ` Thomas Petazzoni
2016-09-14  5:34                       ` Bharat Kumar Gogada
2016-09-14  5:34                         ` Bharat Kumar Gogada
2016-09-14  5:34                         ` Bharat Kumar Gogada
2016-09-14  9:55                       ` Kishon Vijay Abraham I
2016-09-14  9:55                         ` Kishon Vijay Abraham I
2016-09-14  9:55                         ` Kishon Vijay Abraham I
2017-03-02  8:46                     ` Bharat Kumar Gogada
2017-03-02  8:46                       ` Bharat Kumar Gogada
2017-03-02  8:46                       ` Bharat Kumar Gogada
2016-09-13 14:32 ` [PATCH 1/3] PCI: Xilinx NWL PCIe: Expanding PCIe core errors and printing event occurred Bjorn Helgaas
2016-09-13 14:32   ` Bjorn Helgaas
2016-09-14  5:26   ` Bharat Kumar Gogada
2016-09-14  5:26     ` Bharat Kumar Gogada
2016-09-14  5:26     ` Bharat Kumar Gogada
2016-09-13 15:18 ` Bjorn Helgaas
2016-09-13 15:18   ` Bjorn Helgaas
2016-09-14  5:28   ` Bharat Kumar Gogada
2016-09-14  5:28     ` Bharat Kumar Gogada
2016-09-14  5:28     ` Bharat Kumar Gogada

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