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([2602:ae:154e:e201:74df:dfaf:5af0:e528]) by smtp.gmail.com with ESMTPSA id t12-20020a17090a5d8c00b001f200eabc65sm1787102pji.41.2022.08.03.09.18.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Aug 2022 09:18:56 -0700 (PDT) Message-ID: <855034e1-2dd3-4b68-3c60-9fd2345b3b55@linaro.org> Date: Wed, 3 Aug 2022 09:18:54 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [RFC PATCH 1/3] target/ppc: Bugfix fadd/fsub result with OE/UE set Content-Language: en-US To: "Lucas Mateus Castro(alqotel)" , qemu-ppc@nongnu.org Cc: danielhb413@gmail.com, Aurelien Jarno , Peter Maydell , =?UTF-8?Q?Alex_Benn=c3=a9e?= , David Gibson , Greg Kurz , "open list:All patches CC here" References: <20220803122217.20847-1-lucas.araujo@eldorado.org.br> <20220803122217.20847-2-lucas.araujo@eldorado.org.br> From: Richard Henderson In-Reply-To: <20220803122217.20847-2-lucas.araujo@eldorado.org.br> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::431; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/3/22 05:22, Lucas Mateus Castro(alqotel) wrote: > From: "Lucas Mateus Castro (alqotel)" > > As mentioned in the functions float_overflow_excp and > float_underflow_excp, the result should be adjusted as mentioned in the > ISA (subtracted 192/1536 from the exponent of the intermediate result if > an overflow occurs with OE set and added 192/1536 to the exponent of the > intermediate result if an underflow occurs with UE set), but at those > functions the result has already been rounded so it is not possible to > add/subtract from the intermediate result anymore. > > This patch creates a new function that receives the value that should be > subtracted/added from the exponent if an overflow/underflow happens, to > not leave some arbitrary numbers from the PowerISA in the middle of the > FPU code. If these numbers are 0 the new functions just call the old > ones. > > I used 2 values here for overflow and underflow, maybe it'd be better to > just use the same ones, any thoughts? > > Signed-off-by: Lucas Mateus Castro (alqotel) > --- > An alternative I've thought was to always return the value adjusted if a > overflow or underflow occurs and in float_underflow_excp and > float_overflow_excp adjust it to inf/den/0 if OE/UE is 0, but I didn't > saw many advantages to that approach. > --- > fpu/softfloat.c | 75 +++++++++++++++++++++++++++++++++++++++++ > include/fpu/softfloat.h | 2 ++ > target/ppc/fpu_helper.c | 10 ++++-- > 3 files changed, 85 insertions(+), 2 deletions(-) > > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index 4a871ef2a1..a407129dcb 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -268,6 +268,8 @@ typedef bool (*f64_check_fn)(union_float64 a, union_float64 b); > > typedef float32 (*soft_f32_op2_fn)(float32 a, float32 b, float_status *s); > typedef float64 (*soft_f64_op2_fn)(float64 a, float64 b, float_status *s); > +typedef float64 (*soft_f64_op2_int2_fn)(float64 a, float64 b, int c, int d, > + float_status *s); > typedef float (*hard_f32_op2_fn)(float a, float b); > typedef double (*hard_f64_op2_fn)(double a, double b); > > @@ -401,6 +403,19 @@ float64_gen2(float64 xa, float64 xb, float_status *s, > return soft(ua.s, ub.s, s); > } > > +static inline float64 > +float64_gen2_excp(float64 xa, float64 xb, int xc, int xd, float_status *s, > + hard_f64_op2_fn hard, soft_f64_op2_fn soft, > + soft_f64_op2_int2_fn soft_excp, f64_check_fn pre, > + f64_check_fn post) > +{ > + if (xc || xd) { > + return soft_excp(xa, xb, xc, xd, s); > + } else { > + return float64_gen2(xa, xb, s, hard, soft, pre, post); > + } > +} > + > /* > * Classify a floating point number. Everything above float_class_qnan > * is a NaN so cls >= float_class_qnan is any NaN. > @@ -1929,6 +1944,39 @@ static double hard_f64_sub(double a, double b) > return a - b; > } > > +static float64 QEMU_SOFTFLOAT_ATTR > +soft_f64_addsub_excp_en(float64 a, float64 b, int oe_sub, int ue_sum, > + float_status *status, bool subtract) > +{ > + FloatParts64 pa, pb, *pr; > + > + float64_unpack_canonical(&pa, a, status); > + float64_unpack_canonical(&pb, b, status); > + pr = parts_addsub(&pa, &pb, status, subtract); > + > + if (unlikely(oe_sub && (pr->exp > 1023))) { > + pr->exp -= oe_sub; > + float_raise(float_flag_overflow, status); > + } else if (unlikely(ue_sum && (pr->exp < -1022))) { > + pr->exp += ue_sum; > + float_raise(float_flag_underflow, status); > + } > + > + return float64_round_pack_canonical(pr, status); This is incorrect, because the exponent is not fixed until the middle of round_pack_canonical. I think you should not add new functions like this, with new parameters, but instead add fields to float_status, which would then be checked at the places currently setting underflow and overflow. r~