From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751386AbdIAGtd (ORCPT ); Fri, 1 Sep 2017 02:49:33 -0400 Received: from regular1.263xmail.com ([211.150.99.134]:49097 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751000AbdIAGtc (ORCPT ); Fri, 1 Sep 2017 02:49:32 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-RL-SENDER: hjc@rock-chips.com X-FST-TO: sandy.huang@rock-chips.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: hjc@rock-chips.com X-UNIQUE-TAG: <15eea474108034e1ba68f16b8aed1b7f> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip Soc LVDS To: Heiko Stuebner , Mark yao Cc: Mark Rutland , devicetree@vger.kernel.org, David Airlie , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring , linux-arm-kernel@lists.infradead.org References: <1503469615-39406-1-git-send-email-hjc@rock-chips.com> <1503469622-39462-1-git-send-email-hjc@rock-chips.com> <59A53F27.2010308@rock-chips.com> <150421032.ptNih2SRiG@phil> From: Sandy Huang Message-ID: <8578950f-74a9-6fa7-5530-70f4b41a5a8f@rock-chips.com> Date: Fri, 1 Sep 2017 14:49:16 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <150421032.ptNih2SRiG@phil> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi heiko, 在 2017/8/29 18:29, Heiko Stuebner 写道: > Am Dienstag, 29. August 2017, 18:17:11 CEST schrieb Mark yao: >> On 2017年08月23日 14:26, Sandy Huang wrote: >>> This patch add Document for Rockchip Soc RK3288 LVDS, >>> This based on the patches from Mark yao and Heiko Stuebner. >>> >>> Signed-off-by: Sandy Huang >>> Signed-off-by: Mark yao >>> Signed-off-by: Heiko Stuebner >>> --- >> Looks good for me: >> >> Reviewed-by: Mark Yao > > Signed-off ordering is wrong though ... you add a Signed-off below > all others and you could also drop the one from me, as I don't > think I did provide to much value between Mark's and Sandy's variant > of the patches :-) > > > Heiko > > I will change the Singed off order as bellow at next version. Signed-off-by: Mark yao Signed-off-by: Heiko Stuebner Signed-off-by: Sandy Huang >>> Changes according to Rob Herring's review. >>> >>> .../bindings/display/rockchip/rockchip-lvds.txt | 99 ++++++++++++++++++++++ >>> 1 file changed, 99 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt >>> >>> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt >>> new file mode 100644 >>> index 0000000..da6939e >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt >>> @@ -0,0 +1,99 @@ >>> +Rockchip RK3288 LVDS interface >>> +================================ >>> + >>> +Required properties: >>> +- compatible: matching the soc type, one of >>> + - "rockchip,rk3288-lvds"; >>> + >>> +- reg: physical base address of the controller and length >>> + of memory mapped region. >>> +- clocks: must include clock specifiers corresponding to entries in the >>> + clock-names property. >>> +- clock-names: must contain "pclk_lvds" >>> + >>> +- avdd1v0-supply: regulator phandle for 1.0V analog power >>> +- avdd1v8-supply: regulator phandle for 1.8V analog power >>> +- avdd3v3-supply: regulator phandle for 3.3V analog power >>> + >>> +- rockchip,grf: phandle to the general register files syscon >>> +- rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface >>> + >>> +Optional properties: >>> +- pinctrl-names: must contain a "lcdc" entry. >>> +- pinctrl-0: pin control group to be used for this controller. >>> + >>> +Required nodes: >>> + >>> +The lvds has two video ports as described by >>> + Documentation/devicetree/bindings/media/video-interfaces.txt >>> +Their connections are modeled using the OF graph bindings specified in >>> + Documentation/devicetree/bindings/graph.txt. >>> + >>> +- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl >>> +- video port 1 for either a panel or subsequent encoder >>> + >>> +the lvds panel described by >>> + Documentation/devicetree/bindings/display/panel/simple-panel.txt >>> + >>> +Panel required properties: >>> +- ports for remote LVDS output >>> + >>> +Panel optional properties: >>> +- data-mapping: should be "vesa-24","jeida-24" or "jeida-18". >>> +This describes decribed by: >>> + Documentation/devicetree/bindings/display/panel/panel-lvds.txt >>> + >>> +Example: >>> + >>> +lvds_panel: lvds-panel { >>> + compatible = "auo,b101ean01"; >>> + enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>; >>> + data-mapping = "jeida-24"; >>> + >>> + ports { >>> + panel_in_lvds: endpoint { >>> + remote-endpoint = <&lvds_out_panel>; >>> + }; >>> + }; >>> +}; >>> + >>> +For Rockchip RK3288: >>> + >>> + lvds: lvds@ff96c000 { >>> + compatible = "rockchip,rk3288-lvds"; >>> + rockchip,grf = <&grf>; >>> + reg = <0xff96c000 0x4000>; >>> + clocks = <&cru PCLK_LVDS_PHY>; >>> + clock-names = "pclk_lvds"; >>> + pinctrl-names = "lcdc"; >>> + pinctrl-0 = <&lcdc_ctl>; >>> + avdd1v0-supply = <&vdd10_lcd>; >>> + avdd1v8-supply = <&vcc18_lcd>; >>> + avdd3v3-supply = <&vcca_33>; >>> + rockchip,output = "rgb"; >>> + ports { >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + lvds_in: port@0 { >>> + reg = <0>; >>> + >>> + lvds_in_vopb: endpoint@0 { >>> + reg = <0>; >>> + remote-endpoint = <&vopb_out_lvds>; >>> + }; >>> + lvds_in_vopl: endpoint@1 { >>> + reg = <1>; >>> + remote-endpoint = <&vopl_out_lvds>; >>> + }; >>> + }; >>> + >>> + lvds_out: port@1 { >>> + reg = <1>; >>> + >>> + lvds_out_panel: endpoint { >>> + remote-endpoint = <&panel_in_lvds>; >>> + }; >>> + }; >>> + }; >>> + }; >> >> >> > > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sandy Huang Subject: Re: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip Soc LVDS Date: Fri, 1 Sep 2017 14:49:16 +0800 Message-ID: <8578950f-74a9-6fa7-5530-70f4b41a5a8f@rock-chips.com> References: <1503469615-39406-1-git-send-email-hjc@rock-chips.com> <1503469622-39462-1-git-send-email-hjc@rock-chips.com> <59A53F27.2010308@rock-chips.com> <150421032.ptNih2SRiG@phil> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <150421032.ptNih2SRiG@phil> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Heiko Stuebner , Mark yao Cc: Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Rob Herring , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org SGkgaGVpa28sCgrlnKggMjAxNy84LzI5IDE4OjI5LCBIZWlrbyBTdHVlYm5lciDlhpnpgZM6Cj4g QW0gRGllbnN0YWcsIDI5LiBBdWd1c3QgMjAxNywgMTg6MTc6MTEgQ0VTVCBzY2hyaWViIE1hcmsg eWFvOgo+PiBPbiAyMDE35bm0MDjmnIgyM+aXpSAxNDoyNiwgU2FuZHkgSHVhbmcgd3JvdGU6Cj4+ PiBUaGlzIHBhdGNoIGFkZCBEb2N1bWVudCBmb3IgUm9ja2NoaXAgU29jIFJLMzI4OCBMVkRTLAo+ Pj4gVGhpcyBiYXNlZCBvbiB0aGUgcGF0Y2hlcyBmcm9tIE1hcmsgeWFvIGFuZCBIZWlrbyBTdHVl Ym5lci4KPj4+Cj4+PiBTaWduZWQtb2ZmLWJ5OiBTYW5keSBIdWFuZyA8aGpjQHJvY2stY2hpcHMu Y29tPgo+Pj4gU2lnbmVkLW9mZi1ieTogTWFyayB5YW8gPG1hcmsueWFvQHJvY2stY2hpcHMuY29t Pgo+Pj4gU2lnbmVkLW9mZi1ieTogSGVpa28gU3R1ZWJuZXIgPGhlaWtvQHNudGVjaC5kZT4KPj4+ IC0tLQo+PiBMb29rcyBnb29kIGZvciBtZToKPj4KPj4gUmV2aWV3ZWQtYnk6IE1hcmsgWWFvIDxt YXJrLnlhb0Byb2NrLWNoaXBzLmNvbT4KPiAKPiBTaWduZWQtb2ZmIG9yZGVyaW5nIGlzIHdyb25n IHRob3VnaCAuLi4geW91IGFkZCBhIFNpZ25lZC1vZmYgYmVsb3cKPiBhbGwgb3RoZXJzIGFuZCB5 b3UgY291bGQgYWxzbyBkcm9wIHRoZSBvbmUgZnJvbSBtZSwgYXMgSSBkb24ndAo+IHRoaW5rIEkg ZGlkIHByb3ZpZGUgdG8gbXVjaCB2YWx1ZSBiZXR3ZWVuIE1hcmsncyBhbmQgU2FuZHkncyB2YXJp YW50Cj4gb2YgdGhlIHBhdGNoZXMgOi0pCj4gCj4gCj4gSGVpa28KPiAKPiAKSSB3aWxsIGNoYW5n ZSB0aGUgU2luZ2VkIG9mZiBvcmRlciBhcyBiZWxsb3cgYXQgbmV4dCB2ZXJzaW9uLgoKU2lnbmVk LW9mZi1ieTogTWFyayB5YW8gPG1hcmsueWFvQHJvY2stY2hpcHMuY29tPgpTaWduZWQtb2ZmLWJ5 OiBIZWlrbyBTdHVlYm5lciA8aGVpa29Ac250ZWNoLmRlPgpTaWduZWQtb2ZmLWJ5OiBTYW5keSBI dWFuZyA8aGpjQHJvY2stY2hpcHMuY29tPgoKPj4+IENoYW5nZXMgYWNjb3JkaW5nIHRvIFJvYiBI ZXJyaW5nJ3MgcmV2aWV3Lgo+Pj4KPj4+ICAgIC4uLi9iaW5kaW5ncy9kaXNwbGF5L3JvY2tjaGlw L3JvY2tjaGlwLWx2ZHMudHh0ICAgIHwgOTkgKysrKysrKysrKysrKysrKysrKysrKwo+Pj4gICAg MSBmaWxlIGNoYW5nZWQsIDk5IGluc2VydGlvbnMoKykKPj4+ICAgIGNyZWF0ZSBtb2RlIDEwMDY0 NCBEb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvZGlzcGxheS9yb2NrY2hpcC9yb2Nr Y2hpcC1sdmRzLnR4dAo+Pj4KPj4+IGRpZmYgLS1naXQgYS9Eb2N1bWVudGF0aW9uL2RldmljZXRy ZWUvYmluZGluZ3MvZGlzcGxheS9yb2NrY2hpcC9yb2NrY2hpcC1sdmRzLnR4dCBiL0RvY3VtZW50 YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9kaXNwbGF5L3JvY2tjaGlwL3JvY2tjaGlwLWx2ZHMu dHh0Cj4+PiBuZXcgZmlsZSBtb2RlIDEwMDY0NAo+Pj4gaW5kZXggMDAwMDAwMC4uZGE2OTM5ZQo+ Pj4gLS0tIC9kZXYvbnVsbAo+Pj4gKysrIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRp bmdzL2Rpc3BsYXkvcm9ja2NoaXAvcm9ja2NoaXAtbHZkcy50eHQKPj4+IEBAIC0wLDAgKzEsOTkg QEAKPj4+ICtSb2NrY2hpcCBSSzMyODggTFZEUyBpbnRlcmZhY2UKPj4+ICs9PT09PT09PT09PT09 PT09PT09PT09PT09PT09PT09PQo+Pj4gKwo+Pj4gK1JlcXVpcmVkIHByb3BlcnRpZXM6Cj4+PiAr LSBjb21wYXRpYmxlOiBtYXRjaGluZyB0aGUgc29jIHR5cGUsIG9uZSBvZgo+Pj4gKwktICJyb2Nr Y2hpcCxyazMyODgtbHZkcyI7Cj4+PiArCj4+PiArLSByZWc6IHBoeXNpY2FsIGJhc2UgYWRkcmVz cyBvZiB0aGUgY29udHJvbGxlciBhbmQgbGVuZ3RoCj4+PiArCW9mIG1lbW9yeSBtYXBwZWQgcmVn aW9uLgo+Pj4gKy0gY2xvY2tzOiBtdXN0IGluY2x1ZGUgY2xvY2sgc3BlY2lmaWVycyBjb3JyZXNw b25kaW5nIHRvIGVudHJpZXMgaW4gdGhlCj4+PiArCWNsb2NrLW5hbWVzIHByb3BlcnR5Lgo+Pj4g Ky0gY2xvY2stbmFtZXM6IG11c3QgY29udGFpbiAicGNsa19sdmRzIgo+Pj4gKwo+Pj4gKy0gYXZk ZDF2MC1zdXBwbHk6IHJlZ3VsYXRvciBwaGFuZGxlIGZvciAxLjBWIGFuYWxvZyBwb3dlcgo+Pj4g Ky0gYXZkZDF2OC1zdXBwbHk6IHJlZ3VsYXRvciBwaGFuZGxlIGZvciAxLjhWIGFuYWxvZyBwb3dl cgo+Pj4gKy0gYXZkZDN2My1zdXBwbHk6IHJlZ3VsYXRvciBwaGFuZGxlIGZvciAzLjNWIGFuYWxv ZyBwb3dlcgo+Pj4gKwo+Pj4gKy0gcm9ja2NoaXAsZ3JmOiBwaGFuZGxlIHRvIHRoZSBnZW5lcmFs IHJlZ2lzdGVyIGZpbGVzIHN5c2Nvbgo+Pj4gKy0gcm9ja2NoaXAsb3V0cHV0OiAicmdiIiwgImx2 ZHMiIG9yICJkdWFsbHZkcyIsIFRoaXMgZGVzY3JpYmVzIHRoZSBvdXRwdXQgaW50ZXJmYWNlCj4+ PiArCj4+PiArT3B0aW9uYWwgcHJvcGVydGllczoKPj4+ICstIHBpbmN0cmwtbmFtZXM6IG11c3Qg Y29udGFpbiBhICJsY2RjIiBlbnRyeS4KPj4+ICstIHBpbmN0cmwtMDogcGluIGNvbnRyb2wgZ3Jv dXAgdG8gYmUgdXNlZCBmb3IgdGhpcyBjb250cm9sbGVyLgo+Pj4gKwo+Pj4gK1JlcXVpcmVkIG5v ZGVzOgo+Pj4gKwo+Pj4gK1RoZSBsdmRzIGhhcyB0d28gdmlkZW8gcG9ydHMgYXMgZGVzY3JpYmVk IGJ5Cj4+PiArCURvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9tZWRpYS92aWRlby1p bnRlcmZhY2VzLnR4dAo+Pj4gK1RoZWlyIGNvbm5lY3Rpb25zIGFyZSBtb2RlbGVkIHVzaW5nIHRo ZSBPRiBncmFwaCBiaW5kaW5ncyBzcGVjaWZpZWQgaW4KPj4+ICsJRG9jdW1lbnRhdGlvbi9kZXZp Y2V0cmVlL2JpbmRpbmdzL2dyYXBoLnR4dC4KPj4+ICsKPj4+ICstIHZpZGVvIHBvcnQgMCBmb3Ig dGhlIFZPUCBpbnB1dCwgdGhlIHJlbW90ZSBlbmRwb2ludCBtYXliZSB2b3BiIG9yIHZvcGwKPj4+ ICstIHZpZGVvIHBvcnQgMSBmb3IgZWl0aGVyIGEgcGFuZWwgb3Igc3Vic2VxdWVudCBlbmNvZGVy Cj4+PiArCj4+PiArdGhlIGx2ZHMgcGFuZWwgZGVzY3JpYmVkIGJ5Cj4+PiArCURvY3VtZW50YXRp b24vZGV2aWNldHJlZS9iaW5kaW5ncy9kaXNwbGF5L3BhbmVsL3NpbXBsZS1wYW5lbC50eHQKPj4+ ICsKPj4+ICtQYW5lbCByZXF1aXJlZCBwcm9wZXJ0aWVzOgo+Pj4gKy0gcG9ydHMgZm9yIHJlbW90 ZSBMVkRTIG91dHB1dAo+Pj4gKwo+Pj4gK1BhbmVsIG9wdGlvbmFsIHByb3BlcnRpZXM6Cj4+PiAr LSBkYXRhLW1hcHBpbmc6IHNob3VsZCBiZSAidmVzYS0yNCIsImplaWRhLTI0IiBvciAiamVpZGEt MTgiLgo+Pj4gK1RoaXMgZGVzY3JpYmVzIGRlY3JpYmVkIGJ5Ogo+Pj4gKwlEb2N1bWVudGF0aW9u L2RldmljZXRyZWUvYmluZGluZ3MvZGlzcGxheS9wYW5lbC9wYW5lbC1sdmRzLnR4dAo+Pj4gKwo+ Pj4gK0V4YW1wbGU6Cj4+PiArCj4+PiArbHZkc19wYW5lbDogbHZkcy1wYW5lbCB7Cj4+PiArCWNv bXBhdGlibGUgPSAiYXVvLGIxMDFlYW4wMSI7Cj4+PiArCWVuYWJsZS1ncGlvcyA9IDwmZ3Bpbzcg MjEgR1BJT19BQ1RJVkVfSElHSD47Cj4+PiArCWRhdGEtbWFwcGluZyA9ICJqZWlkYS0yNCI7Cj4+ PiArCj4+PiArCXBvcnRzIHsKPj4+ICsJCXBhbmVsX2luX2x2ZHM6IGVuZHBvaW50IHsKPj4+ICsJ CQlyZW1vdGUtZW5kcG9pbnQgPSA8Jmx2ZHNfb3V0X3BhbmVsPjsKPj4+ICsJCX07Cj4+PiArCX07 Cj4+PiArfTsKPj4+ICsKPj4+ICtGb3IgUm9ja2NoaXAgUkszMjg4Ogo+Pj4gKwo+Pj4gKwlsdmRz OiBsdmRzQGZmOTZjMDAwIHsKPj4+ICsJCWNvbXBhdGlibGUgPSAicm9ja2NoaXAscmszMjg4LWx2 ZHMiOwo+Pj4gKwkJcm9ja2NoaXAsZ3JmID0gPCZncmY+Owo+Pj4gKwkJcmVnID0gPDB4ZmY5NmMw MDAgMHg0MDAwPjsKPj4+ICsJCWNsb2NrcyA9IDwmY3J1IFBDTEtfTFZEU19QSFk+Owo+Pj4gKwkJ Y2xvY2stbmFtZXMgPSAicGNsa19sdmRzIjsKPj4+ICsJCXBpbmN0cmwtbmFtZXMgPSAibGNkYyI7 Cj4+PiArCQlwaW5jdHJsLTAgPSA8JmxjZGNfY3RsPjsKPj4+ICsJCWF2ZGQxdjAtc3VwcGx5ID0g PCZ2ZGQxMF9sY2Q+Owo+Pj4gKwkJYXZkZDF2OC1zdXBwbHkgPSA8JnZjYzE4X2xjZD47Cj4+PiAr CQlhdmRkM3YzLXN1cHBseSA9IDwmdmNjYV8zMz47Cj4+PiArCQlyb2NrY2hpcCxvdXRwdXQgPSAi cmdiIjsKPj4+ICsJCXBvcnRzIHsKPj4+ICsJCQkjYWRkcmVzcy1jZWxscyA9IDwxPjsKPj4+ICsJ CQkjc2l6ZS1jZWxscyA9IDwwPjsKPj4+ICsKPj4+ICsJCQlsdmRzX2luOiBwb3J0QDAgewo+Pj4g KwkJCQlyZWcgPSA8MD47Cj4+PiArCj4+PiArCQkJCWx2ZHNfaW5fdm9wYjogZW5kcG9pbnRAMCB7 Cj4+PiArCQkJCQlyZWcgPSA8MD47Cj4+PiArCQkJCQlyZW1vdGUtZW5kcG9pbnQgPSA8JnZvcGJf b3V0X2x2ZHM+Owo+Pj4gKwkJCQl9Owo+Pj4gKwkJCQlsdmRzX2luX3ZvcGw6IGVuZHBvaW50QDEg ewo+Pj4gKwkJCQkJcmVnID0gPDE+Owo+Pj4gKwkJCQkJcmVtb3RlLWVuZHBvaW50ID0gPCZ2b3Bs X291dF9sdmRzPjsKPj4+ICsJCQkJfTsKPj4+ICsJCQl9Owo+Pj4gKwo+Pj4gKwkJCWx2ZHNfb3V0 OiBwb3J0QDEgewo+Pj4gKwkJCQlyZWcgPSA8MT47Cj4+PiArCj4+PiArCQkJCWx2ZHNfb3V0X3Bh bmVsOiBlbmRwb2ludCB7Cj4+PiArCQkJCQlyZW1vdGUtZW5kcG9pbnQgPSA8JnBhbmVsX2luX2x2 ZHM+Owo+Pj4gKwkJCQl9Owo+Pj4gKwkJCX07Cj4+PiArCQl9Owo+Pj4gKwl9Owo+Pgo+Pgo+Pgo+ IAo+IAo+IAo+IF9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f Cj4gTGludXgtcm9ja2NoaXAgbWFpbGluZyBsaXN0Cj4gTGludXgtcm9ja2NoaXBAbGlzdHMuaW5m cmFkZWFkLm9yZwo+IGh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8v bGludXgtcm9ja2NoaXAKPiAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNr dG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2Ry aS1kZXZlbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: hjc@rock-chips.com (Sandy Huang) Date: Fri, 1 Sep 2017 14:49:16 +0800 Subject: [PATCH v7 1/3] dt-bindings: display: Add Document for Rockchip Soc LVDS In-Reply-To: <150421032.ptNih2SRiG@phil> References: <1503469615-39406-1-git-send-email-hjc@rock-chips.com> <1503469622-39462-1-git-send-email-hjc@rock-chips.com> <59A53F27.2010308@rock-chips.com> <150421032.ptNih2SRiG@phil> Message-ID: <8578950f-74a9-6fa7-5530-70f4b41a5a8f@rock-chips.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi heiko, ? 2017/8/29 18:29, Heiko Stuebner ??: > Am Dienstag, 29. August 2017, 18:17:11 CEST schrieb Mark yao: >> On 2017?08?23? 14:26, Sandy Huang wrote: >>> This patch add Document for Rockchip Soc RK3288 LVDS, >>> This based on the patches from Mark yao and Heiko Stuebner. >>> >>> Signed-off-by: Sandy Huang >>> Signed-off-by: Mark yao >>> Signed-off-by: Heiko Stuebner >>> --- >> Looks good for me: >> >> Reviewed-by: Mark Yao > > Signed-off ordering is wrong though ... you add a Signed-off below > all others and you could also drop the one from me, as I don't > think I did provide to much value between Mark's and Sandy's variant > of the patches :-) > > > Heiko > > I will change the Singed off order as bellow at next version. Signed-off-by: Mark yao Signed-off-by: Heiko Stuebner Signed-off-by: Sandy Huang >>> Changes according to Rob Herring's review. >>> >>> .../bindings/display/rockchip/rockchip-lvds.txt | 99 ++++++++++++++++++++++ >>> 1 file changed, 99 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt >>> >>> diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt >>> new file mode 100644 >>> index 0000000..da6939e >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt >>> @@ -0,0 +1,99 @@ >>> +Rockchip RK3288 LVDS interface >>> +================================ >>> + >>> +Required properties: >>> +- compatible: matching the soc type, one of >>> + - "rockchip,rk3288-lvds"; >>> + >>> +- reg: physical base address of the controller and length >>> + of memory mapped region. >>> +- clocks: must include clock specifiers corresponding to entries in the >>> + clock-names property. >>> +- clock-names: must contain "pclk_lvds" >>> + >>> +- avdd1v0-supply: regulator phandle for 1.0V analog power >>> +- avdd1v8-supply: regulator phandle for 1.8V analog power >>> +- avdd3v3-supply: regulator phandle for 3.3V analog power >>> + >>> +- rockchip,grf: phandle to the general register files syscon >>> +- rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface >>> + >>> +Optional properties: >>> +- pinctrl-names: must contain a "lcdc" entry. >>> +- pinctrl-0: pin control group to be used for this controller. >>> + >>> +Required nodes: >>> + >>> +The lvds has two video ports as described by >>> + Documentation/devicetree/bindings/media/video-interfaces.txt >>> +Their connections are modeled using the OF graph bindings specified in >>> + Documentation/devicetree/bindings/graph.txt. >>> + >>> +- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl >>> +- video port 1 for either a panel or subsequent encoder >>> + >>> +the lvds panel described by >>> + Documentation/devicetree/bindings/display/panel/simple-panel.txt >>> + >>> +Panel required properties: >>> +- ports for remote LVDS output >>> + >>> +Panel optional properties: >>> +- data-mapping: should be "vesa-24","jeida-24" or "jeida-18". >>> +This describes decribed by: >>> + Documentation/devicetree/bindings/display/panel/panel-lvds.txt >>> + >>> +Example: >>> + >>> +lvds_panel: lvds-panel { >>> + compatible = "auo,b101ean01"; >>> + enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>; >>> + data-mapping = "jeida-24"; >>> + >>> + ports { >>> + panel_in_lvds: endpoint { >>> + remote-endpoint = <&lvds_out_panel>; >>> + }; >>> + }; >>> +}; >>> + >>> +For Rockchip RK3288: >>> + >>> + lvds: lvds at ff96c000 { >>> + compatible = "rockchip,rk3288-lvds"; >>> + rockchip,grf = <&grf>; >>> + reg = <0xff96c000 0x4000>; >>> + clocks = <&cru PCLK_LVDS_PHY>; >>> + clock-names = "pclk_lvds"; >>> + pinctrl-names = "lcdc"; >>> + pinctrl-0 = <&lcdc_ctl>; >>> + avdd1v0-supply = <&vdd10_lcd>; >>> + avdd1v8-supply = <&vcc18_lcd>; >>> + avdd3v3-supply = <&vcca_33>; >>> + rockchip,output = "rgb"; >>> + ports { >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + lvds_in: port at 0 { >>> + reg = <0>; >>> + >>> + lvds_in_vopb: endpoint at 0 { >>> + reg = <0>; >>> + remote-endpoint = <&vopb_out_lvds>; >>> + }; >>> + lvds_in_vopl: endpoint at 1 { >>> + reg = <1>; >>> + remote-endpoint = <&vopl_out_lvds>; >>> + }; >>> + }; >>> + >>> + lvds_out: port at 1 { >>> + reg = <1>; >>> + >>> + lvds_out_panel: endpoint { >>> + remote-endpoint = <&panel_in_lvds>; >>> + }; >>> + }; >>> + }; >>> + }; >> >> >> > > > > _______________________________________________ > Linux-rockchip mailing list > Linux-rockchip at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rockchip >