From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FEA317CD3 for ; Wed, 9 Nov 2022 14:20:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F16AFC433D6; Wed, 9 Nov 2022 14:20:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668003651; bh=R0d+e4AdJ2Po6pEtyX7eL5IfvQAUQy4DjsaeX0GaoDY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=at9a6f9v122U0kVYFxgGtwpdg96Pc2vJZm4v4xb0dEbLL8IiwKzAx26pGIzPVC2UX NDxi56Imv4Hy6IaBRLmzWLrZxOkkjjPZH8LnUwMVdOBox+/FxAoc+Y2/NvLRy7Tc3G EDimLtiyEEomjqy5nBCqvFRa/MmWCTVlumFQeC0/u3aw44SlR9CZmJckulKXYFt6Rs vLF5NOBvDABZT6tRAtjGKear1eURDWKg7mE4goFIfiOQRy7U+cKFEf/GCtC1I3vQjT I/G6WLS3C9J+y5YWKFQxSzbQWZjC6dkuXMjLmK16H2W53IAJghZxknrykpr+Eqh3ag xtovpcX77veVw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oslwe-004vkC-MP; Wed, 09 Nov 2022 14:20:48 +0000 Date: Wed, 09 Nov 2022 14:20:47 +0000 Message-ID: <86v8nop5ts.wl-maz@kernel.org> From: Marc Zyngier To: Hector Martin Cc: "Rafael J. Wysocki" , Viresh Kumar , Matthias Brugger , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Ulf Hansson , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 4/5] cpufreq: apple-soc: Add new driver to control Apple SoC CPU P-states In-Reply-To: <3d4536c9-4b3b-8312-4868-5e5b42a87424@marcan.st> References: <20221024043925.25379-1-marcan@marcan.st> <20221024043925.25379-5-marcan@marcan.st> <8635bdocco.wl-maz@kernel.org> <3d4536c9-4b3b-8312-4868-5e5b42a87424@marcan.st> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: asahi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: marcan@marcan.st, rafael@kernel.org, viresh.kumar@linaro.org, matthias.bgg@gmail.com, sven@svenpeter.dev, alyssa@rosenzweig.io, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sboyd@kernel.org, ulf.hansson@linaro.org, mark.kettenis@xs4all.nl, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Wed, 09 Nov 2022 12:13:33 +0000, Hector Martin wrote: > > On 24/10/2022 17.27, Marc Zyngier wrote: > > On Mon, 24 Oct 2022 05:39:24 +0100, > > Hector Martin wrote: > >> > >> This driver implements CPU frequency scaling for Apple Silicon SoCs, > >> including M1 (t8103), M1 Max/Pro/Ultra (t600x), and M2 (t8112). > >> > >> Each CPU cluster has its own register set, and frequency management is > >> fully automated by the hardware; the driver only has to write one > >> register. There is boost frequency support, but the hardware will only > >> allow their use if only a subset of cores in a cluster are in > >> non-deep-idle. Since we don't support deep idle yet, these frequencies > >> are not achievable, but the driver supports them. They will remain > >> disabled in the device tree until deep idle is implemented, to avoid > >> confusing users. > >> > >> This driver does not yet implement the memory controller performance > >> state tuning that usually accompanies higher CPU p-states. This will be > >> done in a future patch. > >> > >> Signed-off-by: Hector Martin > >> --- > >> drivers/cpufreq/Kconfig.arm | 9 + > >> drivers/cpufreq/Makefile | 1 + > >> drivers/cpufreq/apple-soc-cpufreq.c | 352 +++++++++++++++++++++++++++ > >> drivers/cpufreq/cpufreq-dt-platdev.c | 2 + > >> 4 files changed, 364 insertions(+) > >> create mode 100644 drivers/cpufreq/apple-soc-cpufreq.c > >> > > > > [...] > > > >> +static struct freq_attr *apple_soc_cpufreq_hw_attr[] = { > >> + &cpufreq_freq_attr_scaling_available_freqs, > >> + NULL, > >> + NULL, > > > > nit: extra NULL? > > That slot gets filled in later if boost is enabled, hence the need for > an extra terminating NULL in that case. Right. Consider placing a comment next to the first NULL so that someone else doesn't consider it useless and accidentally removes it... M. -- Without deviation from the norm, progress is not possible. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 21FEDC433FE for ; Wed, 9 Nov 2022 14:22:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=eisFA/jJtxkns39cYTXsS6/wAIggm/q5VTB1G9qNsfk=; b=dw2/vmMvR0urnl L7ey5yLeb4v5VLs+JidjPMYXK482O/NDBglUC++itkSLTq0Xq7AsXL2+amEFJbZKjn9K9a40/T+kM 2zZkQS7YFNgI/yUb4qb9mOPmS8QbfwbQ9LgpZIMFHXADapFMcUo7epXByuBKHDIOo1ExYo/X5wMhj kSPrUB0cccBZZHuI4hzXQVD+YJhyEkHuUfpvFcruyUC3x2k8QTcjXv8/ef6OSQ0s8vGhiaBIleC0f vbJugNOxkXP1WhCrqYw6hNA6WHzyYQHtV5Kn7FGPslr7oKcrS5R1N0+BannFbU6uPz816fe1J1OM9 7ReXJPyvTJaT+6A+hKaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oslwq-00E5zG-QP; Wed, 09 Nov 2022 14:21:00 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oslwn-00E5vi-4t for linux-arm-kernel@lists.infradead.org; Wed, 09 Nov 2022 14:20:58 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 827B9CE1FA7; Wed, 9 Nov 2022 14:20:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F16AFC433D6; Wed, 9 Nov 2022 14:20:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668003651; bh=R0d+e4AdJ2Po6pEtyX7eL5IfvQAUQy4DjsaeX0GaoDY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=at9a6f9v122U0kVYFxgGtwpdg96Pc2vJZm4v4xb0dEbLL8IiwKzAx26pGIzPVC2UX NDxi56Imv4Hy6IaBRLmzWLrZxOkkjjPZH8LnUwMVdOBox+/FxAoc+Y2/NvLRy7Tc3G EDimLtiyEEomjqy5nBCqvFRa/MmWCTVlumFQeC0/u3aw44SlR9CZmJckulKXYFt6Rs vLF5NOBvDABZT6tRAtjGKear1eURDWKg7mE4goFIfiOQRy7U+cKFEf/GCtC1I3vQjT I/G6WLS3C9J+y5YWKFQxSzbQWZjC6dkuXMjLmK16H2W53IAJghZxknrykpr+Eqh3ag xtovpcX77veVw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oslwe-004vkC-MP; Wed, 09 Nov 2022 14:20:48 +0000 Date: Wed, 09 Nov 2022 14:20:47 +0000 Message-ID: <86v8nop5ts.wl-maz@kernel.org> From: Marc Zyngier To: Hector Martin Cc: "Rafael J. Wysocki" , Viresh Kumar , Matthias Brugger , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Stephen Boyd , Ulf Hansson , Mark Kettenis , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 4/5] cpufreq: apple-soc: Add new driver to control Apple SoC CPU P-states In-Reply-To: <3d4536c9-4b3b-8312-4868-5e5b42a87424@marcan.st> References: <20221024043925.25379-1-marcan@marcan.st> <20221024043925.25379-5-marcan@marcan.st> <8635bdocco.wl-maz@kernel.org> <3d4536c9-4b3b-8312-4868-5e5b42a87424@marcan.st> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: marcan@marcan.st, rafael@kernel.org, viresh.kumar@linaro.org, matthias.bgg@gmail.com, sven@svenpeter.dev, alyssa@rosenzweig.io, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sboyd@kernel.org, ulf.hansson@linaro.org, mark.kettenis@xs4all.nl, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221109_062057_583995_C246E0D0 X-CRM114-Status: GOOD ( 27.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 09 Nov 2022 12:13:33 +0000, Hector Martin wrote: > > On 24/10/2022 17.27, Marc Zyngier wrote: > > On Mon, 24 Oct 2022 05:39:24 +0100, > > Hector Martin wrote: > >> > >> This driver implements CPU frequency scaling for Apple Silicon SoCs, > >> including M1 (t8103), M1 Max/Pro/Ultra (t600x), and M2 (t8112). > >> > >> Each CPU cluster has its own register set, and frequency management is > >> fully automated by the hardware; the driver only has to write one > >> register. There is boost frequency support, but the hardware will only > >> allow their use if only a subset of cores in a cluster are in > >> non-deep-idle. Since we don't support deep idle yet, these frequencies > >> are not achievable, but the driver supports them. They will remain > >> disabled in the device tree until deep idle is implemented, to avoid > >> confusing users. > >> > >> This driver does not yet implement the memory controller performance > >> state tuning that usually accompanies higher CPU p-states. This will be > >> done in a future patch. > >> > >> Signed-off-by: Hector Martin > >> --- > >> drivers/cpufreq/Kconfig.arm | 9 + > >> drivers/cpufreq/Makefile | 1 + > >> drivers/cpufreq/apple-soc-cpufreq.c | 352 +++++++++++++++++++++++++++ > >> drivers/cpufreq/cpufreq-dt-platdev.c | 2 + > >> 4 files changed, 364 insertions(+) > >> create mode 100644 drivers/cpufreq/apple-soc-cpufreq.c > >> > > > > [...] > > > >> +static struct freq_attr *apple_soc_cpufreq_hw_attr[] = { > >> + &cpufreq_freq_attr_scaling_available_freqs, > >> + NULL, > >> + NULL, > > > > nit: extra NULL? > > That slot gets filled in later if boost is enabled, hence the need for > an extra terminating NULL in that case. Right. Consider placing a comment next to the first NULL so that someone else doesn't consider it useless and accidentally removes it... M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel