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From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Zanoni, Paulo R" <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915/icl: Disable pipe CSC and gamma in cursor plane
Date: Mon, 21 May 2018 20:35:13 +0000	[thread overview]
Message-ID: <8716dc41ded8b2df0f3ad00ae5f1881ec5dcd33d.camel@intel.com> (raw)
In-Reply-To: <1526924294.2604.16.camel@intel.com>

On Mon, 2018-05-21 at 10:38 -0700, Paulo Zanoni wrote:
> Em Sex, 2018-05-18 às 13:15 -0700, José Roberto de Souza escreveu:
> > 'Pipe CSC enable' bit is more than just deprecated in ICL+, it was
> > disabled in 077ef1f09c25 'drm/i915/icl: Don't set pipe CSC/Gamma in
> > PLANE_COLOR_CTL' for primary and sprite planes as it was causing
> > those planes to be rendered as always black but it was not disabled
> > in cursor plane, also causing it to be rendered as black.
> > 
> > As mentioned in the commit referenced above, this is a workaround
> > too and the CSC and gamma per plane values needs to be setup before
> > enable CSC and gamma again.
> > 
> > BSpec: 4278 and 7635
> > 
> > Cc: James Ausmus <james.ausmus@intel.com>
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 10 ++++++----
> >  1 file changed, 6 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index c9ec88acad9c..93157d0ec870 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -9673,12 +9673,14 @@ static u32 i9xx_cursor_ctl(const struct
> > intel_crtc_state *crtc_state,
> >  	struct drm_i915_private *dev_priv =
> >  		to_i915(plane_state->base.plane->dev);
> >  	struct intel_crtc *crtc = to_intel_crtc(crtc_state-
> > > base.crtc);
> > 
> > -	u32 cntl;
> > +	u32 cntl = 0;
> >  
> > -	cntl = MCURSOR_GAMMA_ENABLE;
> > +	if (INTEL_GEN(dev_priv) < 11) {
> 
> Bikeshedding: I know the commit you're based on has the same style as
> this one, but generally we prefer "inclusive" checks, so here we'd be
> checking for "<= 10" in order to run the gen10-and-older code. I can
> change this and the checkpatch issue while applying.

Sounds good, thanks

> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> > +		cntl |= MCURSOR_GAMMA_ENABLE;
> >  
> > -	if (HAS_DDI(dev_priv))
> > -		cntl |= CURSOR_PIPE_CSC_ENABLE;
> > +		if (HAS_DDI(dev_priv))
> > +			cntl |= CURSOR_PIPE_CSC_ENABLE;
> > +	}
> >  
> >  	if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv))
> >  		cntl |= MCURSOR_PIPE_SELECT(crtc->pipe);
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      reply	other threads:[~2018-05-21 20:35 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-18 20:15 [PATCH] drm/i915/icl: Disable pipe CSC and gamma in cursor plane José Roberto de Souza
2018-05-18 20:35 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-05-18 20:54 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-19  7:18 ` ✓ Fi.CI.IGT: " Patchwork
2018-05-21 17:38 ` [PATCH] " Paulo Zanoni
2018-05-21 20:35   ` Souza, Jose [this message]

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