From: Jani Nikula <jani.nikula@linux.intel.com>
To: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Enable VDIP Enable VSC whenever GMP DIP enabled
Date: Mon, 12 Dec 2022 11:08:43 +0200 [thread overview]
Message-ID: <871qp5yoo4.fsf@intel.com> (raw)
In-Reply-To: <20221212070228.2563936-1-mitulkumar.ajitkumar.golani@intel.com>
On Mon, 12 Dec 2022, Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> wrote:
> GMP VDIP gets dropped when enabled without VSC DIP being
> enabled. Enable VSC DIP whenever GMP DIP is enabled
I saw the fixed version, but for future reference, please run checkpatch
locally and use CONFIG_DRM_I915_WERROR=y for i915 development to catch
simple errors before sending the patches.
Thanks,
Jani.
>
> WA:14015402699
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 ++
> drivers/gpu/drm/i915/display/intel_lspcon.c | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 72cf83a27405..4d63a9ce5f42 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3278,6 +3278,8 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,
> u32 dip_enable = VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW |
> VIDEO_DIP_ENABLE_VS_HSW | VIDEO_DIP_ENABLE_GMP_HSW |
> VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK;
> + if (IS_DISPLAY_VER(dev_priv, 13, 14)
> + dip_enable |= VIDEO_DIP_ENABLE_VSC_HSW;
> u32 val = intel_de_read(dev_priv, reg) & ~dip_enable;
>
> /* TODO: Add DSC case (DIP_ENABLE_PPS) */
> diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
> index 9ff1c0b223ad..a5c449a05b4d 100644
> --- a/drivers/gpu/drm/i915/display/intel_lspcon.c
> +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
> @@ -630,6 +630,8 @@ u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
> tmp = intel_de_read(dev_priv,
> HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder));
> mask = VIDEO_DIP_ENABLE_GMP_HSW;
> + if (IS_DISPLAY_VER(dev_priv, 13, 14)
> + mask |= VIDEO_DIP_ENABLE_VSC_HSW;
>
> if (tmp & mask)
> val |= intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2022-12-12 9:08 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-12 7:02 [Intel-gfx] [PATCH] drm/i915/display: Enable VDIP Enable VSC whenever GMP DIP enabled Mitul Golani
2022-12-12 7:07 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for " Patchwork
2022-12-12 8:47 ` [Intel-gfx] [PATCH] " kernel test robot
2022-12-12 9:08 ` Jani Nikula [this message]
2022-12-12 7:33 Mitul Golani
2022-12-13 2:58 ` Ville Syrjälä
2022-12-13 14:55 ` Golani, Mitulkumar Ajitkumar
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