From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8F5DC433C1 for ; Mon, 29 Mar 2021 15:17:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B521D61981 for ; Mon, 29 Mar 2021 15:17:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230495AbhC2PRF convert rfc822-to-8bit (ORCPT ); Mon, 29 Mar 2021 11:17:05 -0400 Received: from mslow1.mail.gandi.net ([217.70.178.240]:48121 "EHLO mslow1.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230167AbhC2PQk (ORCPT ); Mon, 29 Mar 2021 11:16:40 -0400 X-Greylist: delayed 1354 seconds by postgrey-1.27 at vger.kernel.org; Mon, 29 Mar 2021 11:16:40 EDT Received: from relay9-d.mail.gandi.net (unknown [217.70.183.199]) by mslow1.mail.gandi.net (Postfix) with ESMTP id CDAA6D00A3; Mon, 29 Mar 2021 14:47:35 +0000 (UTC) X-Originating-IP: 91.175.115.186 Received: from localhost (91-175-115-186.subs.proxad.net [91.175.115.186]) (Authenticated sender: gregory.clement@bootlin.com) by relay9-d.mail.gandi.net (Postfix) with ESMTPSA id 1452BFF811; Mon, 29 Mar 2021 14:47:07 +0000 (UTC) From: Gregory CLEMENT To: Pali =?utf-8?Q?Roh=C3=A1r?= , Andrew Lunn , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Marek =?utf-8?Q?Beh=C3=BAn?= , Miquel Raynal , Tomasz Maciej Nowak , Luka Perkov , Andre Heider , Vladimir Vid , Russell King , =?utf-8?Q?G=C3=A9rald?= Kerma , Konstantin Porotchkin Subject: Re: [PATCH mvebu v3 04/10] cpufreq: armada-37xx: Fix the AVS value for load L1 In-Reply-To: <20210222194158.12342-5-pali@kernel.org> References: <20210114124032.12765-1-pali@kernel.org> <20210222194158.12342-1-pali@kernel.org> <20210222194158.12342-5-pali@kernel.org> Date: Mon, 29 Mar 2021 16:47:07 +0200 Message-ID: <871rbyf250.fsf@BL-laptop> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Pali Rohár writes: > The original CPU voltage value for load L1 is too low for Armada 37xx SoC > when base CPU frequency is 1000 or 1200 MHz. It leads to instabilities > where CPU gets stuck soon after dynamic voltage scaling from load L1 to L0. > > Update the CPU voltage value for load L1 accordingly when base frequency is > 1000 or 1200 MHz. The minimal L1 value for base CPU frequency 1000 MHz is > updated from the original 1.05V to 1.108V and for 1200 MHz is updated to > 1.155V. This minimal L1 value is used only in the case when it is lower > than value for L0. > > This change fixes CPU instability issues on 1 GHz and 1.2 GHz variants of > Espressobin and 1 GHz Turris Mox. > > Marvell previously for 1 GHz variant of Espressobin provided a patch [1] > suitable only for their Marvell Linux kernel 4.4 fork which workarounded > this issue. Patch forced CPU voltage value to 1.108V in all loads. But > such change does not fix CPU instability issues on 1.2 GHz variants of > Armada 3720 SoC. > > During testing we come to the conclusion that using 1.108V as minimal > value for L1 load makes 1 GHz variants of Espressobin and Turris Mox boards > stable. And similarly 1.155V for 1.2 GHz variant of Espressobin. > > These two values 1.108V and 1.155V are documented in Armada 3700 Hardware > Specifications as typical initial CPU voltage values. > > Discussion about this issue is also at the Armbian forum [2]. > > [1] - https://github.com/MarvellEmbeddedProcessors/linux-marvell/commit/dc33b62c90696afb6adc7dbcc4ebbd48bedec269 > [2] - https://forum.armbian.com/topic/10429-how-to-make-espressobin-v7-stable/ > > Signed-off-by: Pali Rohár > Tested-by: Tomasz Maciej Nowak > Tested-by: Anders Trier Olesen > Tested-by: Philip Soares > Fixes: 1c3528232f4b ("cpufreq: armada-37xx: Add AVS support") > Cc: stable@vger.kernel.org Acked-by: Gregory CLEMENT Thanks, Gregory > --- > drivers/cpufreq/armada-37xx-cpufreq.c | 37 +++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c > index b8dc6c849579..c7683d447b11 100644 > --- a/drivers/cpufreq/armada-37xx-cpufreq.c > +++ b/drivers/cpufreq/armada-37xx-cpufreq.c > @@ -73,6 +73,8 @@ > #define LOAD_LEVEL_NR 4 > > #define MIN_VOLT_MV 1000 > +#define MIN_VOLT_MV_FOR_L1_1000MHZ 1108 > +#define MIN_VOLT_MV_FOR_L1_1200MHZ 1155 > > /* AVS value for the corresponding voltage (in mV) */ > static int avs_map[] = { > @@ -208,6 +210,8 @@ static u32 armada_37xx_avs_val_match(int target_vm) > * - L2 & L3 voltage should be about 150mv smaller than L0 voltage. > * This function calculates L1 & L2 & L3 AVS values dynamically based > * on L0 voltage and fill all AVS values to the AVS value table. > + * When base CPU frequency is 1000 or 1200 MHz then there is additional > + * minimal avs value for load L1. > */ > static void __init armada37xx_cpufreq_avs_configure(struct regmap *base, > struct armada_37xx_dvfs *dvfs) > @@ -239,6 +243,19 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base, > for (load_level = 1; load_level < LOAD_LEVEL_NR; load_level++) > dvfs->avs[load_level] = avs_min; > > + /* > + * Set the avs values for load L0 and L1 when base CPU frequency > + * is 1000/1200 MHz to its typical initial values according to > + * the Armada 3700 Hardware Specifications. > + */ > + if (dvfs->cpu_freq_max >= 1000*1000*1000) { > + if (dvfs->cpu_freq_max >= 1200*1000*1000) > + avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1200MHZ); > + else > + avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1000MHZ); > + dvfs->avs[0] = dvfs->avs[1] = avs_min; > + } > + > return; > } > > @@ -258,6 +275,26 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base, > target_vm = avs_map[l0_vdd_min] - 150; > target_vm = target_vm > MIN_VOLT_MV ? target_vm : MIN_VOLT_MV; > dvfs->avs[2] = dvfs->avs[3] = armada_37xx_avs_val_match(target_vm); > + > + /* > + * Fix the avs value for load L1 when base CPU frequency is 1000/1200 MHz, > + * otherwise the CPU gets stuck when switching from load L1 to load L0. > + * Also ensure that avs value for load L1 is not higher than for L0. > + */ > + if (dvfs->cpu_freq_max >= 1000*1000*1000) { > + u32 avs_min_l1; > + > + if (dvfs->cpu_freq_max >= 1200*1000*1000) > + avs_min_l1 = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1200MHZ); > + else > + avs_min_l1 = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L1_1000MHZ); > + > + if (avs_min_l1 > dvfs->avs[0]) > + avs_min_l1 = dvfs->avs[0]; > + > + if (dvfs->avs[1] < avs_min_l1) > + dvfs->avs[1] = avs_min_l1; > + } > } > > static void __init armada37xx_cpufreq_avs_setup(struct regmap *base, > -- > 2.20.1 > -- Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, 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(Exim 4.94 #2 (Red Hat Linux)) id 1lQtAf-000ifI-EW for linux-arm-kernel@lists.infradead.org; Mon, 29 Mar 2021 14:47:18 +0000 X-Originating-IP: 91.175.115.186 Received: from localhost (91-175-115-186.subs.proxad.net [91.175.115.186]) (Authenticated sender: gregory.clement@bootlin.com) by relay9-d.mail.gandi.net (Postfix) with ESMTPSA id 1452BFF811; Mon, 29 Mar 2021 14:47:07 +0000 (UTC) From: Gregory CLEMENT To: Pali =?utf-8?Q?Roh=C3=A1r?= , Andrew Lunn , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Marek =?utf-8?Q?Beh=C3=BAn?= , Miquel Raynal , Tomasz Maciej Nowak , Luka Perkov , Andre Heider , Vladimir Vid , Russell King , =?utf-8?Q?G=C3=A9rald?= Kerma , Konstantin Porotchkin Subject: Re: [PATCH mvebu v3 04/10] cpufreq: armada-37xx: Fix the AVS value for load L1 In-Reply-To: <20210222194158.12342-5-pali@kernel.org> References: <20210114124032.12765-1-pali@kernel.org> <20210222194158.12342-1-pali@kernel.org> <20210222194158.12342-5-pali@kernel.org> Date: Mon, 29 Mar 2021 16:47:07 +0200 Message-ID: <871rbyf250.fsf@BL-laptop> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210329_154716_107419_348C7271 X-CRM114-Status: GOOD ( 27.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org UGFsaSBSb2jDoXIgPHBhbGlAa2VybmVsLm9yZz4gd3JpdGVzOgoKPiBUaGUgb3JpZ2luYWwgQ1BV IHZvbHRhZ2UgdmFsdWUgZm9yIGxvYWQgTDEgaXMgdG9vIGxvdyBmb3IgQXJtYWRhIDM3eHggU29D Cj4gd2hlbiBiYXNlIENQVSBmcmVxdWVuY3kgaXMgMTAwMCBvciAxMjAwIE1Iei4gSXQgbGVhZHMg dG8gaW5zdGFiaWxpdGllcwo+IHdoZXJlIENQVSBnZXRzIHN0dWNrIHNvb24gYWZ0ZXIgZHluYW1p YyB2b2x0YWdlIHNjYWxpbmcgZnJvbSBsb2FkIEwxIHRvIEwwLgo+Cj4gVXBkYXRlIHRoZSBDUFUg dm9sdGFnZSB2YWx1ZSBmb3IgbG9hZCBMMSBhY2NvcmRpbmdseSB3aGVuIGJhc2UgZnJlcXVlbmN5 IGlzCj4gMTAwMCBvciAxMjAwIE1Iei4gVGhlIG1pbmltYWwgTDEgdmFsdWUgZm9yIGJhc2UgQ1BV IGZyZXF1ZW5jeSAxMDAwIE1IeiBpcwo+IHVwZGF0ZWQgZnJvbSB0aGUgb3JpZ2luYWwgMS4wNVYg dG8gMS4xMDhWIGFuZCBmb3IgMTIwMCBNSHogaXMgdXBkYXRlZCB0bwo+IDEuMTU1Vi4gVGhpcyBt aW5pbWFsIEwxIHZhbHVlIGlzIHVzZWQgb25seSBpbiB0aGUgY2FzZSB3aGVuIGl0IGlzIGxvd2Vy Cj4gdGhhbiB2YWx1ZSBmb3IgTDAuCj4KPiBUaGlzIGNoYW5nZSBmaXhlcyBDUFUgaW5zdGFiaWxp dHkgaXNzdWVzIG9uIDEgR0h6IGFuZCAxLjIgR0h6IHZhcmlhbnRzIG9mCj4gRXNwcmVzc29iaW4g YW5kIDEgR0h6IFR1cnJpcyBNb3guCj4KPiBNYXJ2ZWxsIHByZXZpb3VzbHkgZm9yIDEgR0h6IHZh cmlhbnQgb2YgRXNwcmVzc29iaW4gcHJvdmlkZWQgYSBwYXRjaCBbMV0KPiBzdWl0YWJsZSBvbmx5 IGZvciB0aGVpciBNYXJ2ZWxsIExpbnV4IGtlcm5lbCA0LjQgZm9yayB3aGljaCB3b3JrYXJvdW5k ZWQKPiB0aGlzIGlzc3VlLiBQYXRjaCBmb3JjZWQgQ1BVIHZvbHRhZ2UgdmFsdWUgdG8gMS4xMDhW IGluIGFsbCBsb2Fkcy4gQnV0Cj4gc3VjaCBjaGFuZ2UgZG9lcyBub3QgZml4IENQVSBpbnN0YWJp bGl0eSBpc3N1ZXMgb24gMS4yIEdIeiB2YXJpYW50cyBvZgo+IEFybWFkYSAzNzIwIFNvQy4KPgo+ IER1cmluZyB0ZXN0aW5nIHdlIGNvbWUgdG8gdGhlIGNvbmNsdXNpb24gdGhhdCB1c2luZyAxLjEw OFYgYXMgbWluaW1hbAo+IHZhbHVlIGZvciBMMSBsb2FkIG1ha2VzIDEgR0h6IHZhcmlhbnRzIG9m IEVzcHJlc3NvYmluIGFuZCBUdXJyaXMgTW94IGJvYXJkcwo+IHN0YWJsZS4gQW5kIHNpbWlsYXJs eSAxLjE1NVYgZm9yIDEuMiBHSHogdmFyaWFudCBvZiBFc3ByZXNzb2Jpbi4KPgo+IFRoZXNlIHR3 byB2YWx1ZXMgMS4xMDhWIGFuZCAxLjE1NVYgYXJlIGRvY3VtZW50ZWQgaW4gQXJtYWRhIDM3MDAg SGFyZHdhcmUKPiBTcGVjaWZpY2F0aW9ucyBhcyB0eXBpY2FsIGluaXRpYWwgQ1BVIHZvbHRhZ2Ug dmFsdWVzLgo+Cj4gRGlzY3Vzc2lvbiBhYm91dCB0aGlzIGlzc3VlIGlzIGFsc28gYXQgdGhlIEFy bWJpYW4gZm9ydW0gWzJdLgo+Cj4gWzFdIC0gaHR0cHM6Ly9naXRodWIuY29tL01hcnZlbGxFbWJl ZGRlZFByb2Nlc3NvcnMvbGludXgtbWFydmVsbC9jb21taXQvZGMzM2I2MmM5MDY5NmFmYjZhZGM3 ZGJjYzRlYmJkNDhiZWRlYzI2OQo+IFsyXSAtIGh0dHBzOi8vZm9ydW0uYXJtYmlhbi5jb20vdG9w aWMvMTA0MjktaG93LXRvLW1ha2UtZXNwcmVzc29iaW4tdjctc3RhYmxlLwo+Cj4gU2lnbmVkLW9m Zi1ieTogUGFsaSBSb2jDoXIgPHBhbGlAa2VybmVsLm9yZz4KPiBUZXN0ZWQtYnk6IFRvbWFzeiBN YWNpZWogTm93YWsgPHRtbjUwNUBnbWFpbC5jb20+Cj4gVGVzdGVkLWJ5OiBBbmRlcnMgVHJpZXIg T2xlc2VuIDxhbmRlcnMudHJpZXIub2xlc2VuQGdtYWlsLmNvbT4KPiBUZXN0ZWQtYnk6IFBoaWxp cCBTb2FyZXMgPHBoaWxpcHNAbmV0aXNlbnNlLmNvbT4KPiBGaXhlczogMWMzNTI4MjMyZjRiICgi Y3B1ZnJlcTogYXJtYWRhLTM3eHg6IEFkZCBBVlMgc3VwcG9ydCIpCj4gQ2M6IHN0YWJsZUB2Z2Vy Lmtlcm5lbC5vcmcKCkFja2VkLWJ5OiBHcmVnb3J5IENMRU1FTlQgPGdyZWdvcnkuY2xlbWVudEBi b290bGluLmNvbT4KClRoYW5rcywKCkdyZWdvcnkKPiAtLS0KPiAgZHJpdmVycy9jcHVmcmVxL2Fy bWFkYS0zN3h4LWNwdWZyZXEuYyB8IDM3ICsrKysrKysrKysrKysrKysrKysrKysrKysrKwo+ICAx IGZpbGUgY2hhbmdlZCwgMzcgaW5zZXJ0aW9ucygrKQo+Cj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMv Y3B1ZnJlcS9hcm1hZGEtMzd4eC1jcHVmcmVxLmMgYi9kcml2ZXJzL2NwdWZyZXEvYXJtYWRhLTM3 eHgtY3B1ZnJlcS5jCj4gaW5kZXggYjhkYzZjODQ5NTc5Li5jNzY4M2Q0NDdiMTEgMTAwNjQ0Cj4g LS0tIGEvZHJpdmVycy9jcHVmcmVxL2FybWFkYS0zN3h4LWNwdWZyZXEuYwo+ICsrKyBiL2RyaXZl cnMvY3B1ZnJlcS9hcm1hZGEtMzd4eC1jcHVmcmVxLmMKPiBAQCAtNzMsNiArNzMsOCBAQAo+ICAj ZGVmaW5lIExPQURfTEVWRUxfTlIJNAo+ICAKPiAgI2RlZmluZSBNSU5fVk9MVF9NViAxMDAwCj4g KyNkZWZpbmUgTUlOX1ZPTFRfTVZfRk9SX0wxXzEwMDBNSFogMTEwOAo+ICsjZGVmaW5lIE1JTl9W T0xUX01WX0ZPUl9MMV8xMjAwTUhaIDExNTUKPiAgCj4gIC8qICBBVlMgdmFsdWUgZm9yIHRoZSBj b3JyZXNwb25kaW5nIHZvbHRhZ2UgKGluIG1WKSAqLwo+ICBzdGF0aWMgaW50IGF2c19tYXBbXSA9 IHsKPiBAQCAtMjA4LDYgKzIxMCw4IEBAIHN0YXRpYyB1MzIgYXJtYWRhXzM3eHhfYXZzX3ZhbF9t YXRjaChpbnQgdGFyZ2V0X3ZtKQo+ICAgKiAtIEwyICYgTDMgdm9sdGFnZSBzaG91bGQgYmUgYWJv dXQgMTUwbXYgc21hbGxlciB0aGFuIEwwIHZvbHRhZ2UuCj4gICAqIFRoaXMgZnVuY3Rpb24gY2Fs Y3VsYXRlcyBMMSAmIEwyICYgTDMgQVZTIHZhbHVlcyBkeW5hbWljYWxseSBiYXNlZAo+ICAgKiBv biBMMCB2b2x0YWdlIGFuZCBmaWxsIGFsbCBBVlMgdmFsdWVzIHRvIHRoZSBBVlMgdmFsdWUgdGFi bGUuCj4gKyAqIFdoZW4gYmFzZSBDUFUgZnJlcXVlbmN5IGlzIDEwMDAgb3IgMTIwMCBNSHogdGhl biB0aGVyZSBpcyBhZGRpdGlvbmFsCj4gKyAqIG1pbmltYWwgYXZzIHZhbHVlIGZvciBsb2FkIEwx Lgo+ICAgKi8KPiAgc3RhdGljIHZvaWQgX19pbml0IGFybWFkYTM3eHhfY3B1ZnJlcV9hdnNfY29u ZmlndXJlKHN0cnVjdCByZWdtYXAgKmJhc2UsCj4gIAkJCQkJCXN0cnVjdCBhcm1hZGFfMzd4eF9k dmZzICpkdmZzKQo+IEBAIC0yMzksNiArMjQzLDE5IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBhcm1h ZGEzN3h4X2NwdWZyZXFfYXZzX2NvbmZpZ3VyZShzdHJ1Y3QgcmVnbWFwICpiYXNlLAo+ICAJCWZv ciAobG9hZF9sZXZlbCA9IDE7IGxvYWRfbGV2ZWwgPCBMT0FEX0xFVkVMX05SOyBsb2FkX2xldmVs KyspCj4gIAkJCWR2ZnMtPmF2c1tsb2FkX2xldmVsXSA9IGF2c19taW47Cj4gIAo+ICsJCS8qCj4g KwkJICogU2V0IHRoZSBhdnMgdmFsdWVzIGZvciBsb2FkIEwwIGFuZCBMMSB3aGVuIGJhc2UgQ1BV IGZyZXF1ZW5jeQo+ICsJCSAqIGlzIDEwMDAvMTIwMCBNSHogdG8gaXRzIHR5cGljYWwgaW5pdGlh bCB2YWx1ZXMgYWNjb3JkaW5nIHRvCj4gKwkJICogdGhlIEFybWFkYSAzNzAwIEhhcmR3YXJlIFNw ZWNpZmljYXRpb25zLgo+ICsJCSAqLwo+ICsJCWlmIChkdmZzLT5jcHVfZnJlcV9tYXggPj0gMTAw MCoxMDAwKjEwMDApIHsKPiArCQkJaWYgKGR2ZnMtPmNwdV9mcmVxX21heCA+PSAxMjAwKjEwMDAq MTAwMCkKPiArCQkJCWF2c19taW4gPSBhcm1hZGFfMzd4eF9hdnNfdmFsX21hdGNoKE1JTl9WT0xU X01WX0ZPUl9MMV8xMjAwTUhaKTsKPiArCQkJZWxzZQo+ICsJCQkJYXZzX21pbiA9IGFybWFkYV8z N3h4X2F2c192YWxfbWF0Y2goTUlOX1ZPTFRfTVZfRk9SX0wxXzEwMDBNSFopOwo+ICsJCQlkdmZz LT5hdnNbMF0gPSBkdmZzLT5hdnNbMV0gPSBhdnNfbWluOwo+ICsJCX0KPiArCj4gIAkJcmV0dXJu Owo+ICAJfQo+ICAKPiBAQCAtMjU4LDYgKzI3NSwyNiBAQCBzdGF0aWMgdm9pZCBfX2luaXQgYXJt YWRhMzd4eF9jcHVmcmVxX2F2c19jb25maWd1cmUoc3RydWN0IHJlZ21hcCAqYmFzZSwKPiAgCXRh cmdldF92bSA9IGF2c19tYXBbbDBfdmRkX21pbl0gLSAxNTA7Cj4gIAl0YXJnZXRfdm0gPSB0YXJn ZXRfdm0gPiBNSU5fVk9MVF9NViA/IHRhcmdldF92bSA6IE1JTl9WT0xUX01WOwo+ICAJZHZmcy0+ YXZzWzJdID0gZHZmcy0+YXZzWzNdID0gYXJtYWRhXzM3eHhfYXZzX3ZhbF9tYXRjaCh0YXJnZXRf dm0pOwo+ICsKPiArCS8qCj4gKwkgKiBGaXggdGhlIGF2cyB2YWx1ZSBmb3IgbG9hZCBMMSB3aGVu IGJhc2UgQ1BVIGZyZXF1ZW5jeSBpcyAxMDAwLzEyMDAgTUh6LAo+ICsJICogb3RoZXJ3aXNlIHRo ZSBDUFUgZ2V0cyBzdHVjayB3aGVuIHN3aXRjaGluZyBmcm9tIGxvYWQgTDEgdG8gbG9hZCBMMC4K PiArCSAqIEFsc28gZW5zdXJlIHRoYXQgYXZzIHZhbHVlIGZvciBsb2FkIEwxIGlzIG5vdCBoaWdo ZXIgdGhhbiBmb3IgTDAuCj4gKwkgKi8KPiArCWlmIChkdmZzLT5jcHVfZnJlcV9tYXggPj0gMTAw MCoxMDAwKjEwMDApIHsKPiArCQl1MzIgYXZzX21pbl9sMTsKPiArCj4gKwkJaWYgKGR2ZnMtPmNw dV9mcmVxX21heCA+PSAxMjAwKjEwMDAqMTAwMCkKPiArCQkJYXZzX21pbl9sMSA9IGFybWFkYV8z N3h4X2F2c192YWxfbWF0Y2goTUlOX1ZPTFRfTVZfRk9SX0wxXzEyMDBNSFopOwo+ICsJCWVsc2UK PiArCQkJYXZzX21pbl9sMSA9IGFybWFkYV8zN3h4X2F2c192YWxfbWF0Y2goTUlOX1ZPTFRfTVZf Rk9SX0wxXzEwMDBNSFopOwo+ICsKPiArCQlpZiAoYXZzX21pbl9sMSA+IGR2ZnMtPmF2c1swXSkK PiArCQkJYXZzX21pbl9sMSA9IGR2ZnMtPmF2c1swXTsKPiArCj4gKwkJaWYgKGR2ZnMtPmF2c1sx XSA8IGF2c19taW5fbDEpCj4gKwkJCWR2ZnMtPmF2c1sxXSA9IGF2c19taW5fbDE7Cj4gKwl9Cj4g IH0KPiAgCj4gIHN0YXRpYyB2b2lkIF9faW5pdCBhcm1hZGEzN3h4X2NwdWZyZXFfYXZzX3NldHVw KHN0cnVjdCByZWdtYXAgKmJhc2UsCj4gLS0gCj4gMi4yMC4xCj4KCi0tIApHcmVnb3J5IENsZW1l bnQsIEJvb3RsaW4KRW1iZWRkZWQgTGludXggYW5kIEtlcm5lbCBlbmdpbmVlcmluZwpodHRwOi8v Ym9vdGxpbi5jb20KCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMu aW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZv L2xpbnV4LWFybS1rZXJuZWwK