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From: Jani Nikula <jani.nikula@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@gmail.com>, Daniel Vetter <daniel@ffwll.ch>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: add register macro definition style guide
Date: Tue, 08 Aug 2017 11:38:18 +0300	[thread overview]
Message-ID: <871somfo91.fsf@nikula.org> (raw)
In-Reply-To: <CABVU7+sZ+jUNSn1AVaiGneBmCj7kJKHctXcKn2nWnug3FfshXw@mail.gmail.com>

On Mon, 07 Aug 2017, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote:
> good idea.
>
>
> On Mon, Aug 7, 2017 at 9:10 AM, Daniel Vetter <daniel@ffwll.ch> wrote:
>> On Fri, Aug 04, 2017 at 01:38:36PM +0300, Jani Nikula wrote:
>>
>>> + *
>>> + * For bit fields, define a _MASK and a _SHIFT macro. Define bit field contents
>>> + * so that they are already shifted in place, and can be directly OR'd. For
>>> + * convenience, function-like macros may be used to define bit fields, but do
>>> + * note that the macros may be needed to read as well as write the register
>>> + * contents.
>
> I'd mention define as needed if needed...
> to avoid people adding many definition for shifts and masks that will
> never get used...

With mask and shift defined you don't need to always look at the spec.

> also maybe to add that between name and content the real tabs are required
> as much tab as needed to make sure that all bits defines on that bit
> is vertically aligned.

Added.

> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Thanks.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Technology Center
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  reply	other threads:[~2017-08-08  8:33 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-04 10:38 [PATCH] drm/i915: add register macro definition style guide Jani Nikula
2017-08-04 10:54 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-08-07 16:10 ` [PATCH] " Daniel Vetter
2017-08-07 17:01   ` Rodrigo Vivi
2017-08-08  8:38     ` Jani Nikula [this message]
2017-08-08  8:31   ` Jani Nikula
2017-08-10  3:53 ` Pandiyan, Dhinakaran

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