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[88.21.205.111]) by smtp.gmail.com with ESMTPSA id u15sm4086112edt.24.2020.12.04.09.13.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Dec 2020 09:13:25 -0800 (PST) Subject: Re: [RFC v7 14/22] cpu: Move cpu_exec_* to tcg_ops To: Claudio Fontana , Paolo Bonzini , Thomas Huth , Richard Henderson , Stefano Stabellini , Wenchao Wang , Roman Bolshakov , Sunil Muthuswamy References: <20201130023535.16689-1-cfontana@suse.de> <20201130023535.16689-15-cfontana@suse.de> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <872334f0-b83f-3d7e-4d85-9a2b8e32884d@redhat.com> Date: Fri, 4 Dec 2020 18:13:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.4.0 MIME-Version: 1.0 In-Reply-To: <20201130023535.16689-15-cfontana@suse.de> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=63.128.21.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.496, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Eduardo Habkost , Paul Durrant , Jason Wang , Marcelo Tosatti , qemu-devel@nongnu.org, Peter Xu , Dario Faggioli , Cameron Esfahani , haxm-team@intel.com, Colin Xu , Anthony Perard , Bruce Rogers , Olaf Hering , "Emilio G . Cota" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 11/30/20 3:35 AM, Claudio Fontana wrote: > From: Eduardo Habkost > > Signed-off-by: Eduardo Habkost > --- > accel/tcg/cpu-exec.c | 12 ++++++------ > include/hw/core/cpu.h | 6 ------ > include/hw/core/tcg-cpu-ops.h | 9 +++++++++ > target/alpha/cpu.c | 3 ++- > target/arm/cpu.c | 2 +- > target/arm/cpu64.c | 2 +- > target/arm/cpu_tcg.c | 2 +- > target/avr/cpu.c | 2 +- > target/cris/cpu.c | 2 +- > target/hppa/cpu.c | 2 +- > target/i386/tcg-cpu.c | 6 +++--- > target/lm32/cpu.c | 2 +- > target/m68k/cpu.c | 2 +- > target/microblaze/cpu.c | 2 +- > target/mips/cpu.c | 2 +- > target/nios2/cpu.c | 2 +- > target/openrisc/cpu.c | 2 +- > target/ppc/translate_init.c.inc | 6 +++--- > target/riscv/cpu.c | 2 +- > target/rx/cpu.c | 2 +- > target/s390x/cpu.c | 2 +- > target/sh4/cpu.c | 2 +- > target/sparc/cpu.c | 2 +- > target/tilegx/cpu.c | 2 +- > target/unicore32/cpu.c | 2 +- > target/xtensa/cpu.c | 2 +- > 26 files changed, 43 insertions(+), 39 deletions(-) > > diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c > index 816ef29f68..07ff1fa4dc 100644 > --- a/accel/tcg/cpu-exec.c > +++ b/accel/tcg/cpu-exec.c > @@ -240,8 +240,8 @@ static void cpu_exec_enter(CPUState *cpu) > { > CPUClass *cc = CPU_GET_CLASS(cpu); > > - if (cc->cpu_exec_enter) { > - cc->cpu_exec_enter(cpu); > + if (cc->tcg_ops.cpu_exec_enter) { > + cc->tcg_ops.cpu_exec_enter(cpu); > } > } > > @@ -249,8 +249,8 @@ static void cpu_exec_exit(CPUState *cpu) > { > CPUClass *cc = CPU_GET_CLASS(cpu); > > - if (cc->cpu_exec_exit) { > - cc->cpu_exec_exit(cpu); > + if (cc->tcg_ops.cpu_exec_exit) { > + cc->tcg_ops.cpu_exec_exit(cpu); > } > } > > @@ -625,8 +625,8 @@ static inline bool cpu_handle_interrupt(CPUState *cpu, > True when it is, and we should restart on a new TB, > and via longjmp via cpu_loop_exit. */ > else { > - if (cc->cpu_exec_interrupt && > - cc->cpu_exec_interrupt(cpu, interrupt_request)) { > + if (cc->tcg_ops.cpu_exec_interrupt && > + cc->tcg_ops.cpu_exec_interrupt(cpu, interrupt_request)) { > if (need_replay_interrupt(interrupt_request)) { > replay_interrupt(); > } > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h > index 19211cb409..538f3e6cd3 100644 > --- a/include/hw/core/cpu.h > +++ b/include/hw/core/cpu.h > @@ -146,9 +146,6 @@ struct TranslationBlock; > * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the > * gdb stub. Returns a pointer to the XML contents for the specified XML file > * or NULL if the CPU doesn't have a dynamically generated content for it. > - * @cpu_exec_enter: Callback for cpu_exec preparation. > - * @cpu_exec_exit: Callback for cpu_exec cleanup. > - * @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec. > * @disas_set_info: Setup architecture specific components of disassembly info > * @adjust_watchpoint_address: Perform a target-specific adjustment to an > * address before attempting to match it against watchpoints. > @@ -211,9 +208,6 @@ struct CPUClass { > const char *gdb_core_xml_file; > gchar * (*gdb_arch_name)(CPUState *cpu); > const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname); > - void (*cpu_exec_enter)(CPUState *cpu); > - void (*cpu_exec_exit)(CPUState *cpu); > - bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); > > void (*disas_set_info)(CPUState *cpu, disassemble_info *info); > vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len); > diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h > index 109291ac52..e12f32919b 100644 > --- a/include/hw/core/tcg-cpu-ops.h > +++ b/include/hw/core/tcg-cpu-ops.h > @@ -10,6 +10,9 @@ > #ifndef TCG_CPU_OPS_H > #define TCG_CPU_OPS_H > > +/** > + * struct TcgCpuOperations: TCG operations specific to a CPU class > + */ > typedef struct TcgCpuOperations { > /** > * @initialize: Initalize TCG state > @@ -28,6 +31,12 @@ typedef struct TcgCpuOperations { > * @set_pc(tb->pc). > */ > void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb); > + /** @cpu_exec_enter: Callback for cpu_exec preparation */ > + void (*cpu_exec_enter)(CPUState *cpu); > + /** @cpu_exec_exit: Callback for cpu_exec cleanup */ > + void (*cpu_exec_exit)(CPUState *cpu); > + /** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */ > + bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request); > } TcgCpuOperations; > > #endif /* TCG_CPU_OPS_H */ > diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c > index d66f0351a9..4f206c154d 100644 > --- a/target/alpha/cpu.c > +++ b/target/alpha/cpu.c > @@ -218,7 +218,6 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) > cc->class_by_name = alpha_cpu_class_by_name; > cc->has_work = alpha_cpu_has_work; > cc->do_interrupt = alpha_cpu_do_interrupt; > - cc->cpu_exec_interrupt = alpha_cpu_exec_interrupt; > cc->dump_state = alpha_cpu_dump_state; > cc->set_pc = alpha_cpu_set_pc; > cc->gdb_read_register = alpha_cpu_gdb_read_register; > @@ -234,6 +233,8 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) > cc->tcg_ops.initialize = alpha_translate_init; > > cc->gdb_num_core_regs = 67; > + > + cc->tcg_ops.cpu_exec_interrupt = alpha_cpu_exec_interrupt; With cc->tcg_ops.* guarded with #ifdef CONFIG_TCG: Reviewed-by: Philippe Mathieu-Daudé