All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 14/19] drm/i915/perf: Add Wa_1608133521:dg2
Date: Mon, 29 Aug 2022 17:04:06 +0300	[thread overview]
Message-ID: <8735dff8o9.fsf@intel.com> (raw)
In-Reply-To: <20220823204155.8178-15-umesh.nerlige.ramappa@intel.com>

On Tue, 23 Aug 2022, Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> wrote:
> DG2 introduces 64 bit counters and OA reports that have 64 bit values
> for fields in the report header - report_id, timestamp, context_id and
> gpu ticks. i915 uses report_id, timestamp and context_id to check for
> valid reports.
>
> In some DG2 variants, only the lower dwords for timestamp, report_id and
> context_id are accessible. Add workaround for such reports.
>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_perf.c | 9 ++++++++-
>  1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index a28f07923d8f..a858ce57e465 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -310,7 +310,7 @@ static u32 i915_oa_max_sample_rate = 100000;
>   * be used as a mask to align the OA tail pointer. In some of the
>   * formats, R is used to denote reserved field.
>   */
> -static const struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {
> +static struct i915_oa_format oa_formats[I915_OA_FORMAT_MAX] = {

Can't do this. This is shared between devices, and once you make it
mutable and change it, you'll change it for *all* devices.

Your options are having const data for all variants you need, or you
make a device specific copy and modify. The former is generally better
if you usually don't need to modify it.

BR,
Jani.


>  	[I915_OA_FORMAT_A13]	    = { 0, 64 },
>  	[I915_OA_FORMAT_A29]	    = { 1, 128 },
>  	[I915_OA_FORMAT_A13_B8_C8]  = { 2, 128 },
> @@ -4746,6 +4746,13 @@ static void oa_init_supported_formats(struct i915_perf *perf)
>  		/* Wa_16010703925:dg2 */
>  		clear_bit(I915_OAR_FORMAT_A36u64_B8_C8, perf->format_mask);
>   	}
> +
> +	if (IS_DG2_GRAPHICS_STEP(i915, G10, STEP_A0, STEP_B0) ||
> +	    IS_DG2_GRAPHICS_STEP(i915, G11, STEP_A0, STEP_FOREVER)) {
> +		/* Wa_1608133521:dg2 */
> +		oa_formats[I915_OAR_FORMAT_A36u64_B8_C8].header = HDR_32_BIT;
> +		oa_formats[I915_OA_FORMAT_A38u64_R2u64_B8_C8].header = HDR_32_BIT;
> +	}
>  }
>  
>  static void i915_perf_init_info(struct drm_i915_private *i915)

-- 
Jani Nikula, Intel Open Source Graphics Center

  reply	other threads:[~2022-08-29 14:08 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-23 20:41 [Intel-gfx] [PATCH 00/19] Add DG2 OA support Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 01/19] drm/i915/perf: Fix OA filtering logic for GuC mode Umesh Nerlige Ramappa
2022-09-06 14:33   ` Lionel Landwerlin
2022-09-06 17:39     ` Umesh Nerlige Ramappa
2022-09-06 18:39       ` Lionel Landwerlin
2022-09-14 22:26         ` Umesh Nerlige Ramappa
2022-09-14 23:13           ` Umesh Nerlige Ramappa
2022-09-15 22:49             ` Umesh Nerlige Ramappa
2022-09-20  3:22               ` Dixit, Ashutosh
2022-09-22  3:51                 ` Dixit, Ashutosh
2022-09-22 11:05             ` Lionel Landwerlin
2022-09-09 23:47   ` Dixit, Ashutosh
2022-09-13  3:08     ` Dixit, Ashutosh
2022-09-14 23:37       ` Umesh Nerlige Ramappa
2022-09-14 23:36     ` Umesh Nerlige Ramappa
2022-09-22  3:44     ` Dixit, Ashutosh
2022-09-22  3:49       ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats for DG2 Umesh Nerlige Ramappa
2022-09-06 19:35   ` Lionel Landwerlin
2022-09-06 19:46     ` Umesh Nerlige Ramappa
2022-09-06 19:59       ` Lionel Landwerlin
2022-09-13 15:40   ` Dixit, Ashutosh
2022-09-14 20:54     ` Umesh Nerlige Ramappa
2022-09-14 21:16       ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 03/19] drm/i915/perf: Fix noa wait predication " Umesh Nerlige Ramappa
2022-09-20  0:35   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 04/19] drm/i915/perf: Determine gen12 oa ctx offset at runtime Umesh Nerlige Ramappa
2022-09-06 19:48   ` Lionel Landwerlin
2022-09-06 20:35     ` Umesh Nerlige Ramappa
2022-09-08 18:32       ` Lionel Landwerlin
2022-09-08 23:04         ` Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 05/19] drm/i915/perf: Enable commands per clock reporting in OA Umesh Nerlige Ramappa
2022-09-06 19:51   ` Lionel Landwerlin
2022-09-14  0:19   ` Dixit, Ashutosh
2022-09-15  0:04     ` Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 06/19] drm/i915/perf: Use helpers to process reports w.r.t. OA buffer size Umesh Nerlige Ramappa
2022-09-14 16:04   ` Dixit, Ashutosh
2022-09-14 18:19     ` Umesh Nerlige Ramappa
2022-09-14 19:07       ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 07/19] drm/i915/perf: Simply use stream->ctx Umesh Nerlige Ramappa
2022-09-06 19:52   ` Lionel Landwerlin
2022-08-23 20:41 ` [Intel-gfx] [PATCH 08/19] drm/i915/perf: Move gt-specific data from i915->perf to gt->perf Umesh Nerlige Ramappa
2022-09-06 19:54   ` Lionel Landwerlin
2022-09-14 18:20   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 09/19] drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops Umesh Nerlige Ramappa
2022-09-14 19:04   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 10/19] drm/i915/perf: Use gt-specific ggtt for OA and noa-wait buffers Umesh Nerlige Ramappa
2022-09-06 19:56   ` Lionel Landwerlin
2022-09-06 20:28     ` Umesh Nerlige Ramappa
2022-09-06 20:31       ` Lionel Landwerlin
2022-08-23 20:41 ` [Intel-gfx] [PATCH 11/19] drm/i915/perf: Store a pointer to oa_format in oa_buffer Umesh Nerlige Ramappa
2022-09-06 19:56   ` Lionel Landwerlin
2022-09-14 20:43   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 12/19] drm/i915/perf: Parse 64bit report header formats correctly Umesh Nerlige Ramappa
2022-09-16  0:47   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 13/19] drm/i915/perf: Add Wa_16010703925:dg2 Umesh Nerlige Ramappa
2022-09-16  1:08   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 14/19] drm/i915/perf: Add Wa_1608133521:dg2 Umesh Nerlige Ramappa
2022-08-29 14:04   ` Jani Nikula [this message]
2022-09-16  1:21   ` Dixit, Ashutosh
2022-09-16 18:19     ` Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 15/19] drm/i915/perf: Add Wa_1508761755:dg2 Umesh Nerlige Ramappa
2022-09-16  1:34   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 16/19] drm/i915/perf: Apply Wa_18013179988 Umesh Nerlige Ramappa
2022-09-16  5:16   ` Dixit, Ashutosh
2022-09-16 15:22     ` Dixit, Ashutosh
2022-09-16 19:04       ` Umesh Nerlige Ramappa
2022-09-16 18:56     ` Umesh Nerlige Ramappa
2022-09-16 19:57       ` Dixit, Ashutosh
2022-09-16 20:25         ` Umesh Nerlige Ramappa
2022-09-16 21:00           ` Dixit, Ashutosh
2022-09-19 21:21             ` Umesh Nerlige Ramappa
2022-09-20  1:24               ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 17/19] drm/i915/perf: Save/restore EU flex counters across reset Umesh Nerlige Ramappa
2022-09-16  5:40   ` Dixit, Ashutosh
2022-08-23 20:41 ` [Intel-gfx] [PATCH 18/19] drm/i915/guc: Support OA when Wa_16011777198 is enabled Umesh Nerlige Ramappa
2022-09-16 21:41   ` Dixit, Ashutosh
2022-09-16 21:48     ` Umesh Nerlige Ramappa
2022-08-23 20:41 ` [Intel-gfx] [PATCH 19/19] drm/i915/perf: Enable OA for DG2 Umesh Nerlige Ramappa
2022-08-23 21:11 ` [Intel-gfx] [PATCH 02/19] drm/i915/perf: Add OA formats " Umesh Nerlige Ramappa
2022-08-23 21:12 ` [Intel-gfx] [PATCH 19/19] drm/i915/perf: Enable OA " Umesh Nerlige Ramappa
2022-08-23 22:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DG2 OA support (rev2) Patchwork
2022-08-23 22:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2022-08-23  0:03 [Intel-gfx] [PATCH 00/19] Add DG2 OA support Umesh Nerlige Ramappa
2022-08-23  0:03 ` [Intel-gfx] [PATCH 14/19] drm/i915/perf: Add Wa_1608133521:dg2 Umesh Nerlige Ramappa

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8735dff8o9.fsf@intel.com \
    --to=jani.nikula@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=umesh.nerlige.ramappa@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.