From: Markus Armbruster <armbru@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Jia Liu" <proljc@gmail.com>,
"QEMU Trivial" <qemu-trivial@nongnu.org>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Christophe de Dinechin" <dinechin@redhat.com>,
"Stafford Horne" <shorne@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: Re: [PATCH] or1k: Fix compilation hiccup
Date: Mon, 08 Jun 2020 08:03:20 +0200 [thread overview]
Message-ID: <873676ksbb.fsf@dusky.pond.sub.org> (raw)
In-Reply-To: <87eeqx9alv.fsf@dusky.pond.sub.org> (Markus Armbruster's message of "Tue, 02 Jun 2020 09:43:08 +0200")
Markus Armbruster <armbru@redhat.com> writes:
> Peter Maydell <peter.maydell@linaro.org> writes:
>
>> On Fri, 29 May 2020 at 17:23, Christophe de Dinechin
>> <dinechin@redhat.com> wrote:
>>> On 2020-05-26 at 20:51 CEST, Eric Blake wrote...
>>> > diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
>>> > index d08ce6181199..95011a8015b4 100644
>>> > --- a/hw/openrisc/openrisc_sim.c
>>> > +++ b/hw/openrisc/openrisc_sim.c
>>> > @@ -129,7 +129,7 @@ static void openrisc_sim_init(MachineState *machine)
>>> > const char *kernel_filename = machine->kernel_filename;
>>> > OpenRISCCPU *cpu = NULL;
>>> > MemoryRegion *ram;
>>> > - qemu_irq *cpu_irqs[2];
>>> > + qemu_irq *cpu_irqs[2] = {};
>>>
>>> Why is the value [2] correct here? The loop that initializes loops over
>>> machine->smp.cpus. Is it always less than 2 on this machine?
>>
>> Yes: openrisc_sim_machine_init() sets mc->max_cpus = 2.
>> My suggestion of adding an assert() is essentially telling the
>> compiler that indeed smp_cpus must always be in the range [1,2],
>> which we can tell but it can't.
>
> Do we have a proper patch for this on the list?
Apparently not.
Philippe did try Peter's suggestion, found it works, but then posted it
only to Launchpad. Philippe, please post to the list, so we can finally
get this fixed.
next prev parent reply other threads:[~2020-06-08 6:04 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-26 18:51 [PATCH] or1k: Fix compilation hiccup Eric Blake
2020-05-26 23:21 ` no-reply
2020-05-27 2:58 ` Eric Blake
2020-05-27 5:29 ` Thomas Huth
2020-05-27 7:27 ` Philippe Mathieu-Daudé
2020-05-27 7:27 ` [Bug 1874073] " Philippe Mathieu-Daudé
2020-05-29 16:21 ` Christophe de Dinechin
2020-05-29 16:40 ` Peter Maydell
2020-06-02 7:43 ` Markus Armbruster
2020-06-08 6:03 ` Markus Armbruster [this message]
2020-06-08 6:22 ` Philippe Mathieu-Daudé
2020-06-08 9:15 ` Markus Armbruster
2020-06-08 15:43 ` Eric Blake
-- strict thread matches above, loose matches on Subject: below --
2020-06-08 7:14 [PATCH] hw/openrisc/openrisc_sim: Add assertion to silent GCC warning Philippe Mathieu-Daudé
2020-06-08 7:14 ` [Bug 1874073] " Philippe Mathieu-Daudé
2020-06-08 7:16 ` Thomas Huth
2020-06-08 15:33 ` Eric Blake
2020-06-08 15:33 ` [Bug 1874073] " Eric Blake
2020-06-09 20:42 ` Stafford Horne
2020-06-09 20:49 ` Stafford Horne
2020-06-09 20:49 ` Eric Blake
2020-06-09 20:49 ` [Bug 1874073] " Eric Blake
2020-04-21 13:16 [Bug 1874073] [NEW] openrisc_sim.c:87:42: error: 'cpu_irqs[0]' may be used uninitialized in this function [-Werror=maybe-uninitialized] Martin Liska
2020-04-21 13:25 ` [Bug 1874073] " Martin Liska
2020-04-21 13:37 ` Peter Maydell
2020-04-21 14:08 ` Martin Liska
2020-04-21 14:36 ` Peter Maydell
2020-04-21 15:08 ` Philippe Mathieu-Daudé
2020-05-27 7:54 ` Martin Liska
2020-06-08 6:25 ` Philippe Mathieu-Daudé
2020-06-08 16:06 ` [PATCH v2] hw/openrisc/openrisc_sim: Add assertion to silence GCC warning Philippe Mathieu-Daudé
2020-06-08 16:06 ` [Bug 1874073] " Philippe Mathieu-Daudé
2020-06-08 19:42 ` Richard Henderson
2020-06-09 17:44 ` [Bug 1874073] " Laurent Vivier
2020-06-09 17:44 ` Laurent Vivier
2020-07-02 8:50 ` [Bug 1874073] Re: openrisc_sim.c:87:42: error: 'cpu_irqs[0]' may be used uninitialized in this function [-Werror=maybe-uninitialized] Philippe Mathieu-Daudé
2020-08-20 14:39 ` Thomas Huth
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