From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52435) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gHtbJ-0000uq-FM for qemu-devel@nongnu.org; Wed, 31 Oct 2018 12:44:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gHtb8-0002SW-MP for qemu-devel@nongnu.org; Wed, 31 Oct 2018 12:44:09 -0400 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:41692) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gHtb8-0002Rl-Eu for qemu-devel@nongnu.org; Wed, 31 Oct 2018 12:44:02 -0400 Received: by mail-wr1-x442.google.com with SMTP id x12-v6so17243953wrw.8 for ; Wed, 31 Oct 2018 09:44:01 -0700 (PDT) References: <20181025144644.15464-1-cota@braap.org> <20181025144644.15464-54-cota@braap.org> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <20181025144644.15464-54-cota@braap.org> Date: Wed, 31 Oct 2018 16:43:59 +0000 Message-ID: <8736sm6p80.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC v4 54/71] openrisc: convert to cpu_interrupt_request List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Emilio G. Cota" Cc: qemu-devel@nongnu.org, Paolo Bonzini , Stafford Horne , Richard Henderson Emilio G. Cota writes: > Cc: Stafford Horne > Reviewed-by: Richard Henderson > Signed-off-by: Emilio G. Cota Reviewed-by: Alex Benn=C3=A9e > --- > hw/openrisc/cputimer.c | 2 +- > target/openrisc/cpu.c | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c > index 850f88761c..739404e4f5 100644 > --- a/hw/openrisc/cputimer.c > +++ b/hw/openrisc/cputimer.c > @@ -102,7 +102,7 @@ static void openrisc_timer_cb(void *opaque) > CPUState *cs =3D CPU(cpu); > > cpu->env.ttmr |=3D TTMR_IP; > - cs->interrupt_request |=3D CPU_INTERRUPT_TIMER; > + cpu_interrupt_request_or(cs, CPU_INTERRUPT_TIMER); > } > > switch (cpu->env.ttmr & TTMR_M) { > diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c > index fb7cb5c507..cdbc9353b7 100644 > --- a/target/openrisc/cpu.c > +++ b/target/openrisc/cpu.c > @@ -32,8 +32,8 @@ static void openrisc_cpu_set_pc(CPUState *cs, vaddr val= ue) > > static bool openrisc_cpu_has_work(CPUState *cs) > { > - return cs->interrupt_request & (CPU_INTERRUPT_HARD | > - CPU_INTERRUPT_TIMER); > + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD | > + CPU_INTERRUPT_TIMER); > } > > static void openrisc_disas_set_info(CPUState *cpu, disassemble_info *inf= o) -- Alex Benn=C3=A9e