From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D023C433F5 for ; Wed, 29 Sep 2021 20:07:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1A5E661529 for ; Wed, 29 Sep 2021 20:07:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346628AbhI2UJD (ORCPT ); Wed, 29 Sep 2021 16:09:03 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:45192 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346400AbhI2UIs (ORCPT ); Wed, 29 Sep 2021 16:08:48 -0400 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1632946025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=tlsVknWTVdSlZTHHBhOHbdQ8+OQgty9cJuZLKmK8P4Q=; b=gvDSGy6EoQ/SGIQIZFDmJHsfEB7eJkkPqMOISO+qHnFj07TZ3W58Un23BsrO2SJOP5oI/M aJO6guQUBAH8/Bk3qH6nN/ewix1KG2QJPceX0aA6/YB23G/6szPYeahrHYodGiUTa4sJw3 /FZWsXw6mEh7VhBM6VWjUtpfmJ1MyBQ8gH/Kr4jh+xX9i1jTFxiEtMvT5ITfqV2Zdl2iut hDO+T4lF0i5fNNlgiuPwCsI0IT4sX4rI8ZFOy5cT5/HIqRV+vFvuNtSUEuzm/YJTXjGs+b b7pZjQr/eDgA9a/2lygRLPEDQUzWaXs9+DASg2sA1gUEIKFp2AwCtM3qayMPgA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1632946025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=tlsVknWTVdSlZTHHBhOHbdQ8+OQgty9cJuZLKmK8P4Q=; b=icQDdrktOulCIkwKp/cwu1bpceb+vYu4ltjmHgN1zZFbMrIXdWbqAISaG/oKDVP8Nru7Uq HTEWYV63v6AU54Cg== To: "Luck, Tony" , Fenghua Yu Cc: Andy Lutomirski , Peter Zijlstra , Ingo Molnar , Borislav Petkov , Dave Hansen , Lu Baolu , Joerg Roedel , Josh Poimboeuf , Dave Jiang , Jacob Jun Pan , Raj Ashok , "Shankar, Ravi V" , iommu@lists.linux-foundation.org, the arch/x86 maintainers , Linux Kernel Mailing List Subject: Re: [PATCH 5/8] x86/mmu: Add mm-based PASID refcounting In-Reply-To: References: <87o88jfajo.ffs@tglx> <87k0j6dsdn.ffs@tglx> <87r1d78t2e.ffs@tglx> <75e95acc-6730-ddcf-d722-66e575076256@kernel.org> <877dez8fqu.ffs@tglx> Date: Wed, 29 Sep 2021 22:07:04 +0200 Message-ID: <874ka387tj.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 29 2021 at 11:31, Tony Luck wrote: > diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c > index a58800973aed..5a3c87fd65de 100644 > --- a/arch/x86/kernel/traps.c > +++ b/arch/x86/kernel/traps.c > @@ -528,6 +528,32 @@ static enum kernel_gp_hint get_kernel_gp_address(struct pt_regs *regs, > > #define GPFSTR "general protection fault" > > +/* > + * When a user executes the ENQCMD instruction it will #GP > + * fault if the IA32_PASID MSR has not been set up with a > + * valid PASID. > + * So if the process has been allocated a PASID (mm->pasid) > + * AND the IA32_PASID MSR has not been initialized, try to > + * fix this #GP by initializing the IA32_PASID MSR. > + * If the #GP was for some other reason, it will trigger > + * again, but this routine will return false and the #GP > + * will be processed. > + */ > +static void try_fixup_pasid(void) > +{ > + if (!cpu_feature_enabled(X86_FEATURE_ENQCMD)) > + return false; > + > +#ifdef CONFIG_IOMMU_SUPPORT > + if (current->mm->pasid && !current->pasid_activated) { > + current->pasid_activated = 1; > + wrmsrl(MSR_IA32_PASID, current->mm->pasid); > + return true; > + } > +#endif > + return false; > +} > + > DEFINE_IDTENTRY_ERRORCODE(exc_general_protection) > { > char desc[sizeof(GPFSTR) + 50 + 2*sizeof(unsigned long) + 1] = GPFSTR; > @@ -536,6 +562,9 @@ DEFINE_IDTENTRY_ERRORCODE(exc_general_protection) > unsigned long gp_addr; > int ret; > > + if (user_mode(regs) && try_fixup_pasid()) > + return; > + > cond_local_irq_enable(regs); > > if (static_cpu_has(X86_FEATURE_UMIP)) { Amen. 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c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1632946025; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=tlsVknWTVdSlZTHHBhOHbdQ8+OQgty9cJuZLKmK8P4Q=; b=icQDdrktOulCIkwKp/cwu1bpceb+vYu4ltjmHgN1zZFbMrIXdWbqAISaG/oKDVP8Nru7Uq HTEWYV63v6AU54Cg== To: "Luck, Tony" , Fenghua Yu Subject: Re: [PATCH 5/8] x86/mmu: Add mm-based PASID refcounting In-Reply-To: References: <87o88jfajo.ffs@tglx> <87k0j6dsdn.ffs@tglx> <87r1d78t2e.ffs@tglx> <75e95acc-6730-ddcf-d722-66e575076256@kernel.org> <877dez8fqu.ffs@tglx> Date: Wed, 29 Sep 2021 22:07:04 +0200 Message-ID: <874ka387tj.ffs@tglx> MIME-Version: 1.0 Cc: "Shankar, Ravi V" , Dave Jiang , Raj Ashok , Peter Zijlstra , the arch/x86 maintainers , Linux Kernel Mailing List , Dave Hansen , iommu@lists.linux-foundation.org, Ingo Molnar , Borislav Petkov , Jacob Jun Pan , Andy Lutomirski , Josh Poimboeuf X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Wed, Sep 29 2021 at 11:31, Tony Luck wrote: > diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c > index a58800973aed..5a3c87fd65de 100644 > --- a/arch/x86/kernel/traps.c > +++ b/arch/x86/kernel/traps.c > @@ -528,6 +528,32 @@ static enum kernel_gp_hint get_kernel_gp_address(struct pt_regs *regs, > > #define GPFSTR "general protection fault" > > +/* > + * When a user executes the ENQCMD instruction it will #GP > + * fault if the IA32_PASID MSR has not been set up with a > + * valid PASID. > + * So if the process has been allocated a PASID (mm->pasid) > + * AND the IA32_PASID MSR has not been initialized, try to > + * fix this #GP by initializing the IA32_PASID MSR. > + * If the #GP was for some other reason, it will trigger > + * again, but this routine will return false and the #GP > + * will be processed. > + */ > +static void try_fixup_pasid(void) > +{ > + if (!cpu_feature_enabled(X86_FEATURE_ENQCMD)) > + return false; > + > +#ifdef CONFIG_IOMMU_SUPPORT > + if (current->mm->pasid && !current->pasid_activated) { > + current->pasid_activated = 1; > + wrmsrl(MSR_IA32_PASID, current->mm->pasid); > + return true; > + } > +#endif > + return false; > +} > + > DEFINE_IDTENTRY_ERRORCODE(exc_general_protection) > { > char desc[sizeof(GPFSTR) + 50 + 2*sizeof(unsigned long) + 1] = GPFSTR; > @@ -536,6 +562,9 @@ DEFINE_IDTENTRY_ERRORCODE(exc_general_protection) > unsigned long gp_addr; > int ret; > > + if (user_mode(regs) && try_fixup_pasid()) > + return; > + > cond_local_irq_enable(regs); > > if (static_cpu_has(X86_FEATURE_UMIP)) { Amen. _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu