From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AFCDC10DCE for ; Fri, 6 Mar 2020 14:36:25 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 79BF820726 for ; Fri, 6 Mar 2020 14:36:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 79BF820726 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 21DFD89A91; Fri, 6 Mar 2020 14:36:25 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 92FDB89AEA for ; Fri, 6 Mar 2020 14:36:22 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Mar 2020 06:36:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,522,1574150400"; d="scan'208";a="264474044" Received: from gaia.fi.intel.com ([10.237.72.192]) by fmsmga004.fm.intel.com with ESMTP; 06 Mar 2020 06:36:21 -0800 Received: by gaia.fi.intel.com (Postfix, from userid 1000) id E51BA5C1DD1; Fri, 6 Mar 2020 16:35:02 +0200 (EET) From: Mika Kuoppala To: Chris Wilson , intel-gfx@lists.freedesktop.org In-Reply-To: <20200306133852.3420322-1-chris@chris-wilson.co.uk> References: <20200306133852.3420322-1-chris@chris-wilson.co.uk> Date: Fri, 06 Mar 2020 16:35:02 +0200 Message-ID: <874kv14kmh.fsf@gaia.fi.intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH 01/17] drm/i915/selftests: Apply a heavy handed flush to i915_active X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Chris Wilson writes: > Due to the ordering of cmpxchg()/dma_fence_signal() inside node_retire(), > we must also use the xchg() as our primary memory barrier to flush the > outstanding callbacks after expected completion of the i915_active. > > Signed-off-by: Chris Wilson Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/selftests/i915_active.c | 29 ++++++++++++++------ > 1 file changed, 21 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c b/drivers/gpu/drm/i915/selftests/i915_active.c > index 3a37c67ab6c4..68bbb1580162 100644 > --- a/drivers/gpu/drm/i915/selftests/i915_active.c > +++ b/drivers/gpu/drm/i915/selftests/i915_active.c > @@ -311,20 +311,33 @@ static void spin_unlock_wait(spinlock_t *lock) > spin_unlock_irq(lock); > } > > +static void active_flush(struct i915_active *ref, > + struct i915_active_fence *active) > +{ > + struct dma_fence *fence; > + > + fence = xchg(__active_fence_slot(active), NULL); > + if (!fence) > + return; > + > + spin_lock_irq(fence->lock); > + __list_del_entry(&active->cb.node); > + spin_unlock_irq(fence->lock); /* serialise with fence->cb_list */ > + atomic_dec(&ref->count); > + > + GEM_BUG_ON(!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)); > +} > + > void i915_active_unlock_wait(struct i915_active *ref) > { > if (i915_active_acquire_if_busy(ref)) { > struct active_node *it, *n; > > + /* Wait for all active callbacks */ > rcu_read_lock(); > - rbtree_postorder_for_each_entry_safe(it, n, &ref->tree, node) { > - struct dma_fence *f; > - > - /* Wait for all active callbacks */ > - f = rcu_dereference(it->base.fence); > - if (f) > - spin_unlock_wait(f->lock); > - } > + active_flush(ref, &ref->excl); > + rbtree_postorder_for_each_entry_safe(it, n, &ref->tree, node) > + active_flush(ref, &it->base); > rcu_read_unlock(); > > i915_active_release(ref); > -- > 2.25.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx