diff for duplicates of <875yywvwcz.fsf@linux.ibm.com>
diff --git a/a/1.txt b/N1/1.txt
index 936a651..64d4a92 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -41,7 +41,7 @@ Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
> + */
> +static inline int cpu_first_tlb_thread_sibling(int cpu)
> +{
-> + if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
+> + if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core = 8))
> + return cpu & ~0x6; /* Big Core */
> + else
> + return cpu_first_thread_sibling(cpu);
@@ -49,7 +49,7 @@ Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
> +
> +static inline int cpu_last_tlb_thread_sibling(int cpu)
> +{
-> + if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
+> + if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core = 8))
> + return cpu | 0x6; /* Big Core */
> + else
> + return cpu_last_thread_sibling(cpu);
@@ -57,7 +57,7 @@ Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
> +
> +static inline int cpu_tlb_thread_sibling_step(void)
> +{
-> + if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))
+> + if (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core = 8))
> + return 2; /* Big Core */
> + else
> + return 1;
@@ -97,10 +97,8 @@ Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
> */
> if (prev_cpu != pcpu) {
> if (prev_cpu >= 0 &&
-> - cpu_first_thread_sibling(prev_cpu) !=
-> - cpu_first_thread_sibling(pcpu))
-> + cpu_first_tlb_thread_sibling(prev_cpu) !=
-> + cpu_first_tlb_thread_sibling(pcpu))
+> - cpu_first_thread_sibling(prev_cpu) !> - cpu_first_thread_sibling(pcpu))
+> + cpu_first_tlb_thread_sibling(prev_cpu) !> + cpu_first_tlb_thread_sibling(pcpu))
> radix_flush_cpu(kvm, prev_cpu, vcpu);
> if (nested)
> nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu;
diff --git a/a/content_digest b/N1/content_digest
index 9867529..a9f0622 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -8,7 +8,7 @@
"Subject\0Re: [PATCH] KVM: PPC: Book3S HV: Fix TLB management on SMT8 POWER9 and POWER10 processors\0"
]
[
- "Date\0Wed, 02 Jun 2021 17:34:52 -0300\0"
+ "Date\0Wed, 02 Jun 2021 20:34:52 +0000\0"
]
[
"To\0Nicholas Piggin <npiggin\@gmail.com>",
@@ -69,7 +69,7 @@
"> + */\n",
"> +static inline int cpu_first_tlb_thread_sibling(int cpu)\n",
"> +{\n",
- "> +\tif (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))\n",
+ "> +\tif (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core = 8))\n",
"> +\t\treturn cpu & ~0x6;\t/* Big Core */\n",
"> +\telse\n",
"> +\t\treturn cpu_first_thread_sibling(cpu);\n",
@@ -77,7 +77,7 @@
"> +\n",
"> +static inline int cpu_last_tlb_thread_sibling(int cpu)\n",
"> +{\n",
- "> +\tif (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))\n",
+ "> +\tif (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core = 8))\n",
"> +\t\treturn cpu | 0x6;\t/* Big Core */\n",
"> +\telse\n",
"> +\t\treturn cpu_last_thread_sibling(cpu);\n",
@@ -85,7 +85,7 @@
"> +\n",
"> +static inline int cpu_tlb_thread_sibling_step(void)\n",
"> +{\n",
- "> +\tif (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core == 8))\n",
+ "> +\tif (cpu_has_feature(CPU_FTR_ARCH_300) && (threads_per_core = 8))\n",
"> +\t\treturn 2;\t\t/* Big Core */\n",
"> +\telse\n",
"> +\t\treturn 1;\n",
@@ -125,10 +125,8 @@
"> \t */\n",
"> \tif (prev_cpu != pcpu) {\n",
"> \t\tif (prev_cpu >= 0 &&\n",
- "> -\t\t cpu_first_thread_sibling(prev_cpu) !=\n",
- "> -\t\t cpu_first_thread_sibling(pcpu))\n",
- "> +\t\t cpu_first_tlb_thread_sibling(prev_cpu) !=\n",
- "> +\t\t cpu_first_tlb_thread_sibling(pcpu))\n",
+ "> -\t\t cpu_first_thread_sibling(prev_cpu) !> -\t\t cpu_first_thread_sibling(pcpu))\n",
+ "> +\t\t cpu_first_tlb_thread_sibling(prev_cpu) !> +\t\t cpu_first_tlb_thread_sibling(pcpu))\n",
"> \t\t\tradix_flush_cpu(kvm, prev_cpu, vcpu);\n",
"> \t\tif (nested)\n",
"> \t\t\tnested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu;\n",
@@ -159,4 +157,4 @@
"> \t}"
]
-ae71d023dcd30fcf98b0092752a2ed0206fcd8f2ea6d2a7e943decce76ba0823
+7b35e39af920a38747d8c5e928fd54a98c389bbf8372d117b9ff4ec0924c2f01
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