From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>
To: Christophe Leroy <christophe.leroy@csgroup.eu>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] powerpc/features: Remove CPU_FTR_NODSISRALIGN
Date: Tue, 13 Oct 2020 12:53:16 +0530 [thread overview]
Message-ID: <875z7ea8t7.fsf@linux.ibm.com> (raw)
In-Reply-To: <0346768708b69bdbfec82f6e5b0364962b9b6932.1602489812.git.christophe.leroy@csgroup.eu>
Christophe Leroy <christophe.leroy@csgroup.eu> writes:
> CPU_FTR_NODSISRALIGN has not been used since
> commit 31bfdb036f12 ("powerpc: Use instruction emulation
> infrastructure to handle alignment faults")
>
> Remove it.
>
> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
> ---
> arch/powerpc/include/asm/cputable.h | 22 ++++++++++------------
> arch/powerpc/kernel/dt_cpu_ftrs.c | 8 --------
> arch/powerpc/kernel/prom.c | 2 +-
> 3 files changed, 11 insertions(+), 21 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
> index 9780c55f9811..accdc1286f37 100644
> --- a/arch/powerpc/include/asm/cputable.h
> +++ b/arch/powerpc/include/asm/cputable.h
> @@ -137,7 +137,6 @@ static inline void cpu_feature_keys_init(void) { }
> #define CPU_FTR_DBELL ASM_CONST(0x00000004)
> #define CPU_FTR_CAN_NAP ASM_CONST(0x00000008)
> #define CPU_FTR_DEBUG_LVL_EXC ASM_CONST(0x00000010)
> -#define CPU_FTR_NODSISRALIGN ASM_CONST(0x00000020)
> #define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x00000040)
> #define CPU_FTR_LWSYNC ASM_CONST(0x00000080)
> #define CPU_FTR_NOEXECUTE ASM_CONST(0x00000100)
> @@ -219,7 +218,7 @@ static inline void cpu_feature_keys_init(void) { }
>
> #ifndef __ASSEMBLY__
>
> -#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN)
> +#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_NOEXECUTE)
>
> #define MMU_FTR_PPCAS_ARCH_V2 (MMU_FTR_TLBIEL | MMU_FTR_16M_PAGE)
>
> @@ -378,33 +377,33 @@ static inline void cpu_feature_keys_init(void) { }
> CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE | CPU_FTR_NOEXECUTE)
> #define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON)
> #define CPU_FTRS_8XX (CPU_FTR_NOEXECUTE)
> -#define CPU_FTRS_40X (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
> -#define CPU_FTRS_44X (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
> -#define CPU_FTRS_440x6 (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE | \
> +#define CPU_FTRS_40X (CPU_FTR_NOEXECUTE)
> +#define CPU_FTRS_44X (CPU_FTR_NOEXECUTE)
> +#define CPU_FTRS_440x6 (CPU_FTR_NOEXECUTE | \
> CPU_FTR_INDEXED_DCR)
> #define CPU_FTRS_47X (CPU_FTRS_440x6)
> #define CPU_FTRS_E200 (CPU_FTR_SPE_COMP | \
> - CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
> + CPU_FTR_COHERENT_ICACHE | \
> CPU_FTR_NOEXECUTE | \
> CPU_FTR_DEBUG_LVL_EXC)
> #define CPU_FTRS_E500 (CPU_FTR_MAYBE_CAN_DOZE | \
> - CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
> + CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \
> CPU_FTR_NOEXECUTE)
> #define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | \
> CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \
> - CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
> -#define CPU_FTRS_E500MC (CPU_FTR_NODSISRALIGN | \
> + CPU_FTR_NOEXECUTE)
> +#define CPU_FTRS_E500MC ( \
> CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
> CPU_FTR_DBELL | CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
> /*
> * e5500/e6500 erratum A-006958 is a timebase bug that can use the
> * same workaround as CPU_FTR_CELL_TB_BUG.
> */
> -#define CPU_FTRS_E5500 (CPU_FTR_NODSISRALIGN | \
> +#define CPU_FTRS_E5500 ( \
> CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
> CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
> CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_CELL_TB_BUG)
> -#define CPU_FTRS_E6500 (CPU_FTR_NODSISRALIGN | \
> +#define CPU_FTRS_E6500 ( \
> CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
> CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
> CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_ALTIVEC_COMP | \
> @@ -554,7 +553,6 @@ enum {
> #define CPU_FTRS_DT_CPU_BASE \
> (CPU_FTR_LWSYNC | \
> CPU_FTR_FPU_UNAVAILABLE | \
> - CPU_FTR_NODSISRALIGN | \
> CPU_FTR_NOEXECUTE | \
> CPU_FTR_COHERENT_ICACHE | \
> CPU_FTR_STCX_CHECKS_ADDRESS | \
> diff --git a/arch/powerpc/kernel/dt_cpu_ftrs.c b/arch/powerpc/kernel/dt_cpu_ftrs.c
> index 1098863e17ee..c598961d9f15 100644
> --- a/arch/powerpc/kernel/dt_cpu_ftrs.c
> +++ b/arch/powerpc/kernel/dt_cpu_ftrs.c
> @@ -273,13 +273,6 @@ static int __init feat_enable_idle_nap(struct dt_cpu_feature *f)
> return 1;
> }
>
> -static int __init feat_enable_align_dsisr(struct dt_cpu_feature *f)
> -{
> - cur_cpu_spec->cpu_features &= ~CPU_FTR_NODSISRALIGN;
> -
> - return 1;
> -}
> -
> static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
> {
> u64 lpcr;
> @@ -641,7 +634,6 @@ static struct dt_cpu_feature_match __initdata
> {"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
> {"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
> {"idle-nap", feat_enable_idle_nap, 0},
> - {"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
> {"idle-stop", feat_enable_idle_stop, 0},
> {"machine-check-power8", feat_enable_mce_power8, 0},
> {"performance-monitor-power8", feat_enable_pmu_power8, 0},
> diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
> index c1545f22c077..a5a5acb627fe 100644
> --- a/arch/powerpc/kernel/prom.c
> +++ b/arch/powerpc/kernel/prom.c
> @@ -165,7 +165,7 @@ static struct ibm_pa_feature {
> #ifdef CONFIG_PPC_RADIX_MMU
> { .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX | MMU_FTR_GTSE },
> #endif
> - { .pabyte = 1, .pabit = 1, .invert = 1, .cpu_features = CPU_FTR_NODSISRALIGN },
> + { .pabyte = 1, .pabit = 1, .invert = 1, },
> { .pabyte = 5, .pabit = 0, .cpu_features = CPU_FTR_REAL_LE,
> .cpu_user_ftrs = PPC_FEATURE_TRUE_LE },
I didn't follow this change. Should the line be dropped?
-aneesh
next prev parent reply other threads:[~2020-10-13 7:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 8:03 [PATCH] powerpc/features: Remove CPU_FTR_NODSISRALIGN Christophe Leroy
2020-10-12 8:03 ` Christophe Leroy
2020-10-12 20:10 ` kernel test robot
2020-10-12 20:10 ` kernel test robot
2020-10-12 20:10 ` kernel test robot
2020-10-13 7:23 ` Aneesh Kumar K.V [this message]
2020-10-13 7:25 ` Christophe Leroy
2020-10-13 10:15 ` Michael Ellerman
2020-10-14 3:19 ` Aneesh Kumar K.V
2020-10-14 11:00 ` Michael Ellerman
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