From mboxrd@z Thu Jan  1 00:00:00 1970
From: Thomas Monjalon <thomas@monjalon.net>
Subject: Re: [PATCH v3 24/40] config: enable NXP DPAA PMD
	compilation
Date: Fri, 22 Sep 2017 00:03:31 +0200
Message-ID: <8761789.OGcidtGilR@xps>
References: <1499179471-19145-1-git-send-email-shreyansh.jain@nxp.com>
 <20170823141213.25476-1-shreyansh.jain@nxp.com>
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Cc: dev@dpdk.org, ferruh.yigit@intel.com, hemant.agrawal@nxp.com
To: Shreyansh Jain <shreyansh.jain@nxp.com>
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23/08/2017 16:11, Shreyansh Jain:
> --- a/config/defconfig_arm64-dpaa-linuxapp-gcc
> +++ b/config/defconfig_arm64-dpaa-linuxapp-gcc
> +#
> +# Compile Environment Abstraction Layer
> +#
> +CONFIG_RTE_MAX_LCORE=4
> +CONFIG_RTE_MAX_NUMA_NODES=1
> +CONFIG_RTE_CACHE_LINE_SIZE=64
> +CONFIG_RTE_PKTMBUF_HEADROOM=128

This should be part of the SoC introduction.

The rest of this patch can be squashed with PMD skeleton.

[...]
> --- a/mk/rte.app.mk
> +++ b/mk/rte.app.mk
> @@ -116,6 +116,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD)      += -lrte_pmd_bnx2x -lz
>  _LDLIBS-$(CONFIG_RTE_LIBRTE_BNXT_PMD)       += -lrte_pmd_bnxt
>  _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_BOND)       += -lrte_pmd_bond
>  _LDLIBS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD)      += -lrte_pmd_cxgbe
> +_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD)       += -lrte_pmd_dpaa
>  _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD)      += -lrte_pmd_dpaa2
>  _LDLIBS-$(CONFIG_RTE_LIBRTE_E1000_PMD)      += -lrte_pmd_e1000
>  _LDLIBS-$(CONFIG_RTE_LIBRTE_ENA_PMD)        += -lrte_pmd_ena
> @@ -182,6 +183,10 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD)      += -lrte_bus_fslmc
>  _LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD)      += -lrte_mempool_dpaa2
>  endif # CONFIG_RTE_LIBRTE_DPAA2_PMD
>  
> +ifeq ($(CONFIG_RTE_LIBRTE_DPAA_PMD),y)
> +_LDLIBS-$(CONFIG_RTE_LIBRTE_DPAA_PMD)       += -lrte_bus_dpaa
> +endif

It does not make sense. Please read it carefully.
The same config condition is used twice.

And the dependency should be on the same line as the PMD link above.

The same mistake was done for DPAA2. Please fix it separately.