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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id kx7-20020a170907774700b00722ea7a7febsm1568756ejc.194.2022.06.22.08.18.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Jun 2022 08:18:53 -0700 (PDT) Message-ID: <876c9580-48ca-0491-24bc-4f20871277f0@linaro.org> Date: Wed, 22 Jun 2022 17:18:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH V2 7/8] arm64: dts: Add ipq5018 SoC and MP03 board support Content-Language: en-US To: Sricharan R , agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, linus.walleij@linaro.org, catalin.marinas@arm.com, p.zabel@pengutronix.de, quic_varada@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20220621161126.15883-1-quic_srichara@quicinc.com> <20220621161126.15883-8-quic_srichara@quicinc.com> From: Krzysztof Kozlowski In-Reply-To: <20220621161126.15883-8-quic_srichara@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 21/06/2022 18:11, Sricharan R wrote: > From: Varadarajan Narayanan > > Add initial device tree support for the Qualcomm IPQ5018 SoC and > MP03.1-C2 board. > > Co-developed-by: Sricharan R > Signed-off-by: Sricharan R > Signed-off-by: Varadarajan Narayanan Chain needs fixes. > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > .../arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts | 29 +++ > arch/arm64/boot/dts/qcom/ipq5018.dtsi | 221 ++++++++++++++++++ > 3 files changed, 251 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts > create mode 100644 arch/arm64/boot/dts/qcom/ipq5018.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index f9e6343acd03..c44e701f093c 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c2.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-asus-z00l.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-huawei-g7.dtb > +dtb-$(CONFIG_ARCH_QCOM) += ipq5018-mp03.1-c2.dtb This does not look like in proper order. > dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8150.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8910.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb > diff --git a/arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts > new file mode 100644 > index 000000000000..d1cd080ec3db > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts > @@ -0,0 +1,29 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause > +/* > + * IPQ5018 CP01 board device tree source > + * > + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. > + */ > + > +/dts-v1/; > + > +#include "ipq5018.dtsi" > + > +/ { > + model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP03-C2"; > + compatible = "qcom,ipq5018-mp03", "qcom,ipq5018"; > + > + aliases { > + serial0 = &blsp1_uart1; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > +}; > + > +&blsp1_uart1 { > + pinctrl-0 = <&serial_1_pins>; > + pinctrl-names = "default"; > + status = "ok"; "okay" is preferred. > +}; > diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > new file mode 100644 > index 000000000000..084fb7b30dfd > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > @@ -0,0 +1,221 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause > +/* > + * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved. > + */ > +/* > + * IPQ5018 SoC device tree source > + * > + * Copyright (c) 2019, The Linux Foundation. All rights reserved. Combine these two comments. > + */ > + > +#include > +#include > +#include > + > +/ { > + #address-cells = <2>; > + #size-cells = <2>; > + interrupt-parent = <&intc>; > + > + sleep_clk: sleep-clk { > + compatible = "fixed-clock"; > + clock-frequency = <32000>; > + #clock-cells = <0>; > + }; > + > + xo: xo { Node name: xo-clk > + compatible = "fixed-clock"; > + clock-frequency = <24000000>; The clock is provided by board, so at least frequency should be defined there. > + #clock-cells = <0>; > + }; > + > + gen2clk0: gen2clk0 { Keep consistent prefixes, so gen2-clk or gen2-0-clk > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <125000000>; > + clock-output-names = "pcie20_phy0_pipe_clk"; > + }; > + > + gen2clk1: gen2clk1 { gen2-1-clk > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <125000000>; > + clock-output-names = "pcie20_phy1_pipe_clk"; > + }; > + Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 42DEDC43334 for ; Wed, 22 Jun 2022 15:19:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WEeiyrUwTprvg50Ji0RcXUmMGg9X0uzkvYjHOxLl5VY=; b=r5mhTJF4mJxRm0 UEgoViDXXczRSaPwYwUgWik4+c2iyvbTiXs3cNNv856tYOE7nQxAnZCgfrzgYjn5S4GHVtm70RSsv IUT94+gE9DcC4LRpXTalNOg3Or2tCwxOrzkz7714KtMcIQvHTYzTbnVPvhSvgiixNZk8Pn7kwPmpN HAkmdrKhnxSztH12e94Bk4rwzQPi0zjB+lWeHMpju6uJadBPtIY4xwcEDQZH4dkNfQp05Ugoktx8e 6GuXSHdn9H61CldHfvW+0tSomQwKTUVb3K9/BhfI+7vHVA3U13l34bb9u/rEBDyacaamTUhQzNbj0 P66SqfozOQ+cvla9UE7Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o428D-00B9eT-0y; Wed, 22 Jun 2022 15:19:01 +0000 Received: from mail-ej1-x636.google.com ([2a00:1450:4864:20::636]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4288-00B9c1-Dg for linux-arm-kernel@lists.infradead.org; Wed, 22 Jun 2022 15:18:58 +0000 Received: by mail-ej1-x636.google.com with SMTP id lw20so12625837ejb.4 for ; Wed, 22 Jun 2022 08:18:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=message-id:date:mime-version:user-agent:subject:content-language:to :references:from:in-reply-to:content-transfer-encoding; bh=KGHN8V/MAIJRoZiVsIc82ytAURP+6QoR2xSizEhnqIE=; b=AwntirR+Sp6DAcIOzmk1WFjzqReFE9ry4/mzdDiW/OfsDDT8ENg01M/2hHXYwwHIKN UooNHpmJMqQqfs7Vkqjin/cA8QdWusjILhtlqMcPWI7VKybsJI4dWRJZJXInr5goSpPq n8v9K8A7lygcL+vLnN//TVwxYquc+uAuoiChh2bgha6kzVQtWN71h6HZoRSaip3TNtJE vE/ayPdvnq4af59PIp/Uqt+Am9pXmPhdysxOlzlhodvasafulr70t9t0F+PrAtUKbQxr to8pHyECA4pe/rw9u4NXpjCmYwKYlN2pMNBsIcTcfcpfg+0nUsm4QYFmll7mIyUQiLMo IVYg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:message-id:date:mime-version:user-agent:subject :content-language:to:references:from:in-reply-to :content-transfer-encoding; bh=KGHN8V/MAIJRoZiVsIc82ytAURP+6QoR2xSizEhnqIE=; b=1FpdCYLyiepldJJJyt0lbOUB/y/TQX9FFE0yi64Bat4NbcEpftDjKzvg7tsztonyhJ a3mTsCcUnY66U+RpjOeIFVrhKZvZw7p3DkkCpWejtod5C81O6yOxjVxUiuVTDOnwb9Cv mUlQFeaY9mL/5fAyT4DjyCy/a8fk98F5SiB6yqkmx3VgwSH5xqmo0Nku4RJop4KWJ2pI o+W6kqmpwLt6d1lIkshP8xSt49hR5gwIQfyV0G/b6g8y4pHhHmmoV5cOgAkdIHuf2RTL 6zafiqQVG3PYvE+7A8KGMwQ6yAVcSxLXQrSgTWvzh1hB4iJD8DLeJmmfMjqyyMeKvrcu T1SA== X-Gm-Message-State: AJIora/5KFKzS3uVl9uBld/1Q9ODseOx8z/zKPpYQCoDElrcvV/lJO+4 lWri8yxERGsZyl3Fqu6LqYOid1J8KoLB1g== X-Google-Smtp-Source: AGRyM1uK824g/kFW/aTUbMXWwczn4JMyDfIciJmyAMAlZ5C5rNgycx6YKUE3YERXNZd/x/RKDRi6zw== X-Received: by 2002:a17:907:868f:b0:702:f865:55de with SMTP id qa15-20020a170907868f00b00702f86555demr3704720ejc.24.1655911134088; Wed, 22 Jun 2022 08:18:54 -0700 (PDT) Received: from [192.168.0.226] (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id kx7-20020a170907774700b00722ea7a7febsm1568756ejc.194.2022.06.22.08.18.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Jun 2022 08:18:53 -0700 (PDT) Message-ID: <876c9580-48ca-0491-24bc-4f20871277f0@linaro.org> Date: Wed, 22 Jun 2022 17:18:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH V2 7/8] arm64: dts: Add ipq5018 SoC and MP03 board support Content-Language: en-US To: Sricharan R , agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, linus.walleij@linaro.org, catalin.marinas@arm.com, p.zabel@pengutronix.de, quic_varada@quicinc.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20220621161126.15883-1-quic_srichara@quicinc.com> <20220621161126.15883-8-quic_srichara@quicinc.com> From: Krzysztof Kozlowski In-Reply-To: <20220621161126.15883-8-quic_srichara@quicinc.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220622_081856_567387_EC3A4716 X-CRM114-Status: GOOD ( 19.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 21/06/2022 18:11, Sricharan R wrote: > From: Varadarajan Narayanan > > Add initial device tree support for the Qualcomm IPQ5018 SoC and > MP03.1-C2 board. > > Co-developed-by: Sricharan R > Signed-off-by: Sricharan R > Signed-off-by: Varadarajan Narayanan Chain needs fixes. > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > .../arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts | 29 +++ > arch/arm64/boot/dts/qcom/ipq5018.dtsi | 221 ++++++++++++++++++ > 3 files changed, 251 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts > create mode 100644 arch/arm64/boot/dts/qcom/ipq5018.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index f9e6343acd03..c44e701f093c 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c2.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-asus-z00l.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-huawei-g7.dtb > +dtb-$(CONFIG_ARCH_QCOM) += ipq5018-mp03.1-c2.dtb This does not look like in proper order. > dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8150.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8910.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb > diff --git a/arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts > new file mode 100644 > index 000000000000..d1cd080ec3db > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts > @@ -0,0 +1,29 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause > +/* > + * IPQ5018 CP01 board device tree source > + * > + * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. > + */ > + > +/dts-v1/; > + > +#include "ipq5018.dtsi" > + > +/ { > + model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP03-C2"; > + compatible = "qcom,ipq5018-mp03", "qcom,ipq5018"; > + > + aliases { > + serial0 = &blsp1_uart1; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > +}; > + > +&blsp1_uart1 { > + pinctrl-0 = <&serial_1_pins>; > + pinctrl-names = "default"; > + status = "ok"; "okay" is preferred. > +}; > diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > new file mode 100644 > index 000000000000..084fb7b30dfd > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi > @@ -0,0 +1,221 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause > +/* > + * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved. > + */ > +/* > + * IPQ5018 SoC device tree source > + * > + * Copyright (c) 2019, The Linux Foundation. All rights reserved. Combine these two comments. > + */ > + > +#include > +#include > +#include > + > +/ { > + #address-cells = <2>; > + #size-cells = <2>; > + interrupt-parent = <&intc>; > + > + sleep_clk: sleep-clk { > + compatible = "fixed-clock"; > + clock-frequency = <32000>; > + #clock-cells = <0>; > + }; > + > + xo: xo { Node name: xo-clk > + compatible = "fixed-clock"; > + clock-frequency = <24000000>; The clock is provided by board, so at least frequency should be defined there. > + #clock-cells = <0>; > + }; > + > + gen2clk0: gen2clk0 { Keep consistent prefixes, so gen2-clk or gen2-0-clk > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <125000000>; > + clock-output-names = "pcie20_phy0_pipe_clk"; > + }; > + > + gen2clk1: gen2clk1 { gen2-1-clk > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <125000000>; > + clock-output-names = "pcie20_phy1_pipe_clk"; > + }; > + Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel