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Tue, 15 Jun 2021 21:37:23 +0000 Received: from b03ledav004.gho.boulder.ibm.com (b03ledav004.gho.boulder.ibm.com [9.17.130.235]) by b03cxnp08028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 15FLbMla27853110 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 15 Jun 2021 21:37:22 GMT Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 65B557806E; Tue, 15 Jun 2021 21:37:22 +0000 (GMT) Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A8E6F7807F; Tue, 15 Jun 2021 21:37:21 +0000 (GMT) Received: from localhost (unknown [9.211.38.153]) by b03ledav004.gho.boulder.ibm.com (Postfix) with ESMTPS; Tue, 15 Jun 2021 21:37:21 +0000 (GMT) From: Fabiano Rosas To: Richard Henderson , Bruno Piazera Larsen , qemu-devel@nongnu.org Subject: Re: [RFC PATCH v2 2/2] target/ppc: make gdb able to translate priviledged addresses In-Reply-To: <7ce3cd57-0abf-f0d9-11ec-6fdc42b89b62@linaro.org> References: <20210614191630.101304-1-bruno.larsen@eldorado.org.br> <20210614191630.101304-2-bruno.larsen@eldorado.org.br> <1c27c473-be10-41cf-d633-bcd838fed78e@eldorado.org.br> <7ce3cd57-0abf-f0d9-11ec-6fdc42b89b62@linaro.org> Date: Tue, 15 Jun 2021 18:37:19 -0300 Message-ID: <877diuq06o.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: Bv8lAKr3ccvb1tSVMLCRveH_fzezZWvk X-Proofpoint-GUID: Bv8lAKr3ccvb1tSVMLCRveH_fzezZWvk X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-06-15_07:2021-06-15, 2021-06-15 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 priorityscore=1501 adultscore=0 mlxlogscore=999 malwarescore=0 bulkscore=0 mlxscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104190000 definitions=main-2106150132 Received-SPF: pass client-ip=148.163.158.5; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: luis.pires@eldorado.org.br, Greg Kurz , lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Richard Henderson writes: > On 6/15/21 4:32 AM, Bruno Piazera Larsen wrote: >> On 14/06/2021 19:37, Richard Henderson wrote: >>> On 6/14/21 12:16 PM, Bruno Larsen (billionai) wrote: >>>> This patch changes ppc_cpu_get_phys_page_debug so that it is now >>>> able to translate both, priviledged and real mode addresses >>>> independently of whether the CPU executing it has those permissions >>>> >>>> This was mentioned by Fabiano as something that would be very useful to >>>> help with debugging, but could possibly constitute a security issue if >>>> that debug function can be called in some way by prodution code. the >>>> solution was implemented such that it would be trivial to wrap it arou= nd >>>> ifdefs for building only with --enable-debug, for instance, but we are >>>> not sure this is the best approach, hence why it is an RFC. >>>> >>>> Suggested-by: Fabiano Rosas >>>> Signed-off-by: Bruno Larsen (billionai) >>>> --- >>>> =C2=A0 target/ppc/mmu_helper.c | 23 +++++++++++++++++++++++ >>>> =C2=A0 1 file changed, 23 insertions(+) >>> >>> I think the first part is unnecessary.=C2=A0 Either the cpu is in super= visor mode or it=20 >>> isn't, and gdb should use the correct address space.=C2=A0 If you reall= y want to force=20 >>> supervisor lookup from a guest that is paused in usermode, I suppose yo= u could force=20 >>> MSR.PR=3D1 while you're performing the access and set it back afterward. >> I don't see why GDB should not be able to see supervisor level addresses= just because the=20 >> CPU can't. > > Because then when you are debugging, you then don't know whether the addr= ess is actually=20 > accessible in the current cpu context. > @Bruno, so this is what I referred to somewhere else on the thread, people expect GDB to have the same access level of the currently executing code. So implementing my suggestion would break their workflow. >>> I think the second part is actively wrong -- real-mode address lookup w= ill (for the most=20 >>> part) always succeed.=C2=A0 Moreover, the gdb user will have no idea th= at you've silently=20 >>> changed addressing methods. >>=20 >> I disagree. Real-mode address will mostly fail, since during the boot pr= ocess Linux=20 >> kernels set the MMU to use only virtual addresses, so real mode addresse= s only work when=20 >> debugging the firmware or the early setup of the kernel. After that, GDB= can basically=20 >> only see virtual addresses. > > Exactly. But you changed that so that any unmapped address will re-try w= ith real-mode,=20 > which (outside of hv) simply maps real->physical and returns the input. > > One should have to perform some special action to see addresses in a diff= erent cpu=20 > context. I don't think that gdb supports such a special action at the mo= ment. If you=20 > want that feature though, that's where you should start. I think we can just drop this patch. The scenarios where debugging across MMU contexts happen are quite limited. My use case was a while back when implementing single-step for KVM guests; there were some situations where GDB would have issues setting breakpoints around kernel code that altered MSR_IR/DR. But that is mostly anecdotal at this point. If I ever run into that again, now I know where to look. > > > r~