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From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: linux-sunxi@googlegroups.com
Cc: maxime.ripard@bootlin.com, wens@csie.org, robh+dt@kernel.org,
	airlied@linux.ie, gustavo@padovan.org,
	maarten.lankhorst@linux.intel.com, seanpaul@chromium.org,
	mark.rutland@arm.com, dri-devel@lists.freedesktop.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [linux-sunxi] [PATCH v2 20/27] drm/sun4i: Don't change clock bits in DW HDMI PHY driver
Date: Fri, 15 Jun 2018 18:44:33 +0200	[thread overview]
Message-ID: <8789732.RJMkczUIGD@jernej-laptop> (raw)
In-Reply-To: <20180612200036.21483-21-jernej.skrabec@siol.net>

Dne torek, 12. junij 2018 ob 22:00:29 CEST je Jernej Skrabec napisal(a):
> DW HDMI PHY driver and PHY clock driver share same registers. Make sure
> that DW HDMI PHY setup code doesn't change any clock related bits and
> set them to 0 during initialization.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> ---
>  drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h  |  2 +-
>  drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 12 +++++++++++-
>  2 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
> b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h index 79154f0f674a..3ba71aff92fc
> 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
> +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
> @@ -98,7 +98,7 @@
>  #define SUN8I_HDMI_PHY_PLL_CFG1_LDO2_EN		BIT(29)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_LDO1_EN		BIT(28)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_HV_IS_33	BIT(27)
> -#define SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL	BIT(26)
> +#define SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL_MSK	BIT(26)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_PLLEN		BIT(25)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_LDO_VSET(x)	((x) << 22)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_UNKNOWN(x)	((x) << 20)
> diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
> b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c index 966688f04741..cd07ceb71601
> 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
> @@ -183,7 +183,13 @@ static int sun8i_hdmi_phy_config_h3(struct dw_hdmi
> *hdmi, regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG,
>  			   SUN8I_HDMI_PHY_ANA_CFG1_TXEN_MASK, 0);
> 
> -	regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, pll_cfg1_init);
> +	/*
> +	 * NOTE: We have to be careful not to overwrite PHY parent
> +	 * clock selection bit and clock divider.
> +	 */
> +	regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG,
> +			   (u32)~SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL_MSK,
> +			   pll_cfg1_init);
>  	regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG,
>  			   (u32)~SUN8I_HDMI_PHY_PLL_CFG2_PREDIV_MSK,
>  			   pll_cfg2_init);
> @@ -352,6 +358,10 @@ static void sun8i_hdmi_phy_init_h3(struct
> sun8i_hdmi_phy *phy) SUN8I_HDMI_PHY_ANA_CFG3_SCLEN |
>  			   SUN8I_HDMI_PHY_ANA_CFG3_SDAEN);
> 
> +	/* reset PLL clock configuration */
> +	regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, 0);
> +	regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, 0);
> +

For some reason, this change breaks HDMI on H3. Clearing only PLL parent 
selection bit works ok, though. I'll fix it in next revision.

Best regards,
Jernej

>  	/* set HW control of CEC pins */
>  	regmap_write(phy->regs, SUN8I_HDMI_PHY_CEC_REG, 0);





WARNING: multiple messages have this Message-ID (diff)
From: "Jernej Škrabec" <jernej.skrabec-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Cc: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org,
	wens-jdAy2FN1RRM@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	airlied-cv59FeDIM0c@public.gmane.org,
	gustavo-THi1TnShQwVAfugRpC6u6w@public.gmane.org,
	maarten.lankhorst-VuQAYsv1563Yd54FQh9/CA@public.gmane.org,
	seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v2 20/27] drm/sun4i: Don't change clock bits in DW HDMI PHY driver
Date: Fri, 15 Jun 2018 18:44:33 +0200	[thread overview]
Message-ID: <8789732.RJMkczUIGD@jernej-laptop> (raw)
In-Reply-To: <20180612200036.21483-21-jernej.skrabec-gGgVlfcn5nU@public.gmane.org>

Dne torek, 12. junij 2018 ob 22:00:29 CEST je Jernej Skrabec napisal(a):
> DW HDMI PHY driver and PHY clock driver share same registers. Make sure
> that DW HDMI PHY setup code doesn't change any clock related bits and
> set them to 0 during initialization.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec-gGgVlfcn5nU@public.gmane.org>
> ---
>  drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h  |  2 +-
>  drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 12 +++++++++++-
>  2 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
> b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h index 79154f0f674a..3ba71aff92fc
> 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
> +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
> @@ -98,7 +98,7 @@
>  #define SUN8I_HDMI_PHY_PLL_CFG1_LDO2_EN		BIT(29)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_LDO1_EN		BIT(28)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_HV_IS_33	BIT(27)
> -#define SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL	BIT(26)
> +#define SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL_MSK	BIT(26)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_PLLEN		BIT(25)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_LDO_VSET(x)	((x) << 22)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_UNKNOWN(x)	((x) << 20)
> diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
> b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c index 966688f04741..cd07ceb71601
> 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
> @@ -183,7 +183,13 @@ static int sun8i_hdmi_phy_config_h3(struct dw_hdmi
> *hdmi, regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG,
>  			   SUN8I_HDMI_PHY_ANA_CFG1_TXEN_MASK, 0);
> 
> -	regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, pll_cfg1_init);
> +	/*
> +	 * NOTE: We have to be careful not to overwrite PHY parent
> +	 * clock selection bit and clock divider.
> +	 */
> +	regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG,
> +			   (u32)~SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL_MSK,
> +			   pll_cfg1_init);
>  	regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG,
>  			   (u32)~SUN8I_HDMI_PHY_PLL_CFG2_PREDIV_MSK,
>  			   pll_cfg2_init);
> @@ -352,6 +358,10 @@ static void sun8i_hdmi_phy_init_h3(struct
> sun8i_hdmi_phy *phy) SUN8I_HDMI_PHY_ANA_CFG3_SCLEN |
>  			   SUN8I_HDMI_PHY_ANA_CFG3_SDAEN);
> 
> +	/* reset PLL clock configuration */
> +	regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, 0);
> +	regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, 0);
> +

For some reason, this change breaks HDMI on H3. Clearing only PLL parent 
selection bit works ok, though. I'll fix it in next revision.

Best regards,
Jernej

>  	/* set HW control of CEC pins */
>  	regmap_write(phy->regs, SUN8I_HDMI_PHY_CEC_REG, 0);

WARNING: multiple messages have this Message-ID (diff)
From: jernej.skrabec@gmail.com (Jernej Škrabec)
To: linux-arm-kernel@lists.infradead.org
Subject: [linux-sunxi] [PATCH v2 20/27] drm/sun4i: Don't change clock bits in DW HDMI PHY driver
Date: Fri, 15 Jun 2018 18:44:33 +0200	[thread overview]
Message-ID: <8789732.RJMkczUIGD@jernej-laptop> (raw)
In-Reply-To: <20180612200036.21483-21-jernej.skrabec@siol.net>

Dne torek, 12. junij 2018 ob 22:00:29 CEST je Jernej Skrabec napisal(a):
> DW HDMI PHY driver and PHY clock driver share same registers. Make sure
> that DW HDMI PHY setup code doesn't change any clock related bits and
> set them to 0 during initialization.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> ---
>  drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h  |  2 +-
>  drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 12 +++++++++++-
>  2 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
> b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h index 79154f0f674a..3ba71aff92fc
> 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
> +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h
> @@ -98,7 +98,7 @@
>  #define SUN8I_HDMI_PHY_PLL_CFG1_LDO2_EN		BIT(29)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_LDO1_EN		BIT(28)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_HV_IS_33	BIT(27)
> -#define SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL	BIT(26)
> +#define SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL_MSK	BIT(26)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_PLLEN		BIT(25)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_LDO_VSET(x)	((x) << 22)
>  #define SUN8I_HDMI_PHY_PLL_CFG1_UNKNOWN(x)	((x) << 20)
> diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
> b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c index 966688f04741..cd07ceb71601
> 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c
> @@ -183,7 +183,13 @@ static int sun8i_hdmi_phy_config_h3(struct dw_hdmi
> *hdmi, regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG,
>  			   SUN8I_HDMI_PHY_ANA_CFG1_TXEN_MASK, 0);
> 
> -	regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, pll_cfg1_init);
> +	/*
> +	 * NOTE: We have to be careful not to overwrite PHY parent
> +	 * clock selection bit and clock divider.
> +	 */
> +	regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG,
> +			   (u32)~SUN8I_HDMI_PHY_PLL_CFG1_CKIN_SEL_MSK,
> +			   pll_cfg1_init);
>  	regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG,
>  			   (u32)~SUN8I_HDMI_PHY_PLL_CFG2_PREDIV_MSK,
>  			   pll_cfg2_init);
> @@ -352,6 +358,10 @@ static void sun8i_hdmi_phy_init_h3(struct
> sun8i_hdmi_phy *phy) SUN8I_HDMI_PHY_ANA_CFG3_SCLEN |
>  			   SUN8I_HDMI_PHY_ANA_CFG3_SDAEN);
> 
> +	/* reset PLL clock configuration */
> +	regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG1_REG, 0);
> +	regmap_write(phy->regs, SUN8I_HDMI_PHY_PLL_CFG2_REG, 0);
> +

For some reason, this change breaks HDMI on H3. Clearing only PLL parent 
selection bit works ok, though. I'll fix it in next revision.

Best regards,
Jernej

>  	/* set HW control of CEC pins */
>  	regmap_write(phy->regs, SUN8I_HDMI_PHY_CEC_REG, 0);

  reply	other threads:[~2018-06-15 16:45 UTC|newest]

Thread overview: 201+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-12 20:00 [PATCH v2 00/27] Add support for R40 HDMI pipeline Jernej Skrabec
2018-06-12 20:00 ` Jernej Skrabec
2018-06-12 20:00 ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 01/27] clk: sunxi-ng: r40: Add minimal rate for video PLLs Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-13  3:18   ` Chen-Yu Tsai
2018-06-13  3:18     ` Chen-Yu Tsai
2018-06-13  3:18     ` Chen-Yu Tsai
2018-06-12 20:00 ` [PATCH v2 02/27] clk: sunxi-ng: r40: Allow setting parent rate to display related clocks Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-13  3:19   ` Chen-Yu Tsai
2018-06-13  3:19     ` Chen-Yu Tsai
2018-06-13  3:19     ` Chen-Yu Tsai
2018-06-12 20:00 ` [PATCH v2 03/27] clk: sunxi-ng: r40: Export video PLLs Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 04/27] dt-bindings: display: sunxi-drm: Add TCON TOP description Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-13  7:34   ` Maxime Ripard
2018-06-13  7:34     ` Maxime Ripard
2018-06-13  7:34     ` Maxime Ripard
2018-06-13 16:03     ` [linux-sunxi] " Jernej Škrabec
2018-06-13 16:03       ` Jernej Škrabec
2018-06-13 16:03       ` Jernej Škrabec
2018-06-15  8:45       ` [linux-sunxi] " Maxime Ripard
2018-06-15  8:45         ` Maxime Ripard
2018-06-15  8:45         ` Maxime Ripard
2018-06-12 20:00 ` [PATCH v2 05/27] drm/sun4i: Add TCON TOP driver Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-13  7:07   ` kbuild test robot
2018-06-13  7:07     ` kbuild test robot
2018-06-13  7:07     ` kbuild test robot
2018-06-12 20:00 ` [PATCH v2 06/27] drm/sun4i: Fix releasing node when enumerating enpoints Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 07/27] drm/sun4i: Split out code for enumerating endpoints in output port Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 08/27] drm/sun4i: Add support for traversing graph with TCON TOP Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 09/27] drm/sun4i: Don't skip TCONs if they don't have channel 0 Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 10/27] dt-bindings: display: sun4i-drm: Add R40 TV TCON description Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-20 19:15   ` Rob Herring
2018-06-20 19:15     ` Rob Herring
2018-06-20 19:15     ` Rob Herring
2018-06-12 20:00 ` [PATCH v2 11/27] drm/sun4i: tcon: Add support for tcon-top gate Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-15  8:31   ` Maxime Ripard
2018-06-15  8:31     ` Maxime Ripard
2018-06-15  8:31     ` Maxime Ripard
2018-06-15 16:41     ` Jernej Škrabec
2018-06-15 16:41       ` Jernej Škrabec
2018-06-15 16:41       ` Jernej Škrabec
2018-06-15 17:13       ` [linux-sunxi] " Chen-Yu Tsai
2018-06-15 17:13         ` Chen-Yu Tsai
2018-06-15 17:13         ` Chen-Yu Tsai
2018-06-15 17:33         ` [linux-sunxi] " Jernej Škrabec
2018-06-15 17:33           ` Jernej Škrabec
2018-06-15 17:33           ` Jernej Škrabec
2018-06-16  5:48           ` [linux-sunxi] " Chen-Yu Tsai
2018-06-16  5:48             ` Chen-Yu Tsai
2018-06-16  5:48             ` Chen-Yu Tsai
2018-06-20 19:37             ` [linux-sunxi] " Jernej Škrabec
2018-06-20 19:37               ` Jernej Škrabec
2018-06-20 19:37               ` Jernej Škrabec
2018-06-21  1:23               ` [linux-sunxi] " Chen-Yu Tsai
2018-06-21  1:23                 ` Chen-Yu Tsai
2018-06-21  1:23                 ` Chen-Yu Tsai
2018-06-21 15:35                 ` [linux-sunxi] " Jernej Škrabec
2018-06-21 15:35                   ` Jernej Škrabec
2018-06-21 15:35                   ` Jernej Škrabec
2018-06-24 19:52                   ` [linux-sunxi] " Jernej Škrabec
2018-06-24 19:52                     ` Jernej Škrabec
2018-06-24 19:52                     ` Jernej Škrabec
2018-06-24 19:52                     ` Jernej Škrabec
2018-06-25  3:51                     ` [linux-sunxi] " Chen-Yu Tsai
2018-06-25  3:51                       ` Chen-Yu Tsai
2018-06-25  3:51                       ` Chen-Yu Tsai
2018-06-25  7:58                       ` [linux-sunxi] " Jernej Škrabec
2018-06-25  7:58                         ` Jernej Škrabec
2018-06-25  7:58                         ` Jernej Škrabec
2018-06-25  7:58                         ` Jernej Škrabec
2018-06-25  8:14                         ` [linux-sunxi] " Chen-Yu Tsai
2018-06-25  8:14                           ` Chen-Yu Tsai
2018-06-25  8:14                           ` Chen-Yu Tsai
2018-06-25  9:10                           ` [linux-sunxi] " Jernej Škrabec
2018-06-25  9:10                             ` Jernej Škrabec
2018-06-25  9:10                             ` Jernej Škrabec
2018-06-25  9:10                             ` Jernej Škrabec
2018-06-12 20:00 ` [PATCH v2 12/27] drm/sun4i: tcon: Generalize engine search algorithm Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 13/27] drm/sun4i: Don't check for LVDS and RGB when TCON has only ch1 Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 14/27] drm/sun4i: Don't check for panel or bridge on TV TCONs Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-13  7:46   ` Maxime Ripard
2018-06-13  7:46     ` Maxime Ripard
2018-06-13  7:46     ` Maxime Ripard
2018-06-13  8:04     ` Chen-Yu Tsai
2018-06-13  8:04       ` Chen-Yu Tsai
2018-06-13  8:04       ` Chen-Yu Tsai
2018-06-13 16:20       ` [linux-sunxi] " Jernej Škrabec
2018-06-13 16:20         ` Jernej Škrabec
2018-06-13 16:20         ` Jernej Škrabec
2018-06-12 20:00 ` [PATCH v2 15/27] drm/sun4i: Add support for R40 TV TCON Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 16/27] dt-bindings: display: sun4i-drm: Add R40 mixer compatibles Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-20 19:16   ` Rob Herring
2018-06-20 19:16     ` Rob Herring
2018-06-20 19:16     ` Rob Herring
2018-06-12 20:00 ` [PATCH v2 17/27] drm/sun4i: Add support for R40 mixers Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 18/27] dt-bindings: display: sun4i-drm: Add description of A64 HDMI PHY Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-20 19:17   ` Rob Herring
2018-06-20 19:17     ` Rob Herring
2018-06-20 19:17     ` Rob Herring
2018-06-12 20:00 ` [PATCH v2 19/27] drm/sun4i: Enable DW HDMI PHY clock Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 20/27] drm/sun4i: Don't change clock bits in DW HDMI PHY driver Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-15 16:44   ` Jernej Škrabec [this message]
2018-06-15 16:44     ` [linux-sunxi] " Jernej Škrabec
2018-06-15 16:44     ` Jernej Škrabec
2018-06-12 20:00 ` [PATCH v2 21/27] drm/sun4i: DW HDMI PHY: Add support for second PLL Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 22/27] drm/sun4i: Add support for second clock parent to DW HDMI PHY clk driver Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 23/27] drm/sun4i: Add support for A64 HDMI PHY Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 24/27] drm: of: Export drm_crtc_port_mask() Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-13  7:36   ` Maxime Ripard
2018-06-13  7:36     ` Maxime Ripard
2018-06-13  7:36     ` Maxime Ripard
2018-06-13 16:04     ` [linux-sunxi] " Jernej Škrabec
2018-06-13 16:04       ` Jernej Škrabec
2018-06-13 16:04       ` Jernej Škrabec
2018-06-12 20:00 ` [PATCH v2 25/27] drm/sun4i: DW HDMI: Expand algorithm for possible crtcs Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 26/27] ARM: dts: sun8i: r40: Add HDMI pipeline Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00 ` [PATCH v2 27/27] ARM: dts: sun8i: r40: Enable HDMI output on BananaPi M2 Ultra Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-12 20:00   ` Jernej Skrabec
2018-06-14  7:12 ` [linux-sunxi] [PATCH v2 00/27] Add support for R40 HDMI pipeline Jagan Teki
2018-06-14  7:12   ` Jagan Teki
2018-06-14  7:12   ` Jagan Teki
2018-06-14 14:34   ` [linux-sunxi] " Jernej Škrabec
2018-06-14 14:34     ` Jernej Škrabec
2018-06-14 14:34     ` Jernej Škrabec
2018-06-14 17:16     ` [linux-sunxi] " Jagan Teki
2018-06-14 17:16       ` Jagan Teki
2018-06-14 17:16       ` Jagan Teki
2018-06-14 17:16       ` Jagan Teki
2018-06-14 17:29       ` [linux-sunxi] " Jernej Škrabec
2018-06-14 17:29         ` Jernej Škrabec
2018-06-14 17:29         ` Jernej Škrabec
2018-06-18 12:58         ` [linux-sunxi] " Jagan Teki
2018-06-18 12:58           ` Jagan Teki
2018-06-18 12:58           ` Jagan Teki
2018-06-18 12:58           ` Jagan Teki
2018-06-18 14:43           ` [linux-sunxi] " Jernej Škrabec
2018-06-18 14:43             ` Jernej Škrabec
2018-06-18 14:43             ` Jernej Škrabec
2018-06-18 18:49             ` [linux-sunxi] " Icenowy Zheng
2018-06-18 18:49               ` Icenowy Zheng
2018-06-18 18:49               ` Icenowy Zheng

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