From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4DDEDC433EF for ; Wed, 15 Sep 2021 10:20:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1005660F38 for ; Wed, 15 Sep 2021 10:20:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1005660F38 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 70D676E900; Wed, 15 Sep 2021 10:20:43 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4DF046E900 for ; Wed, 15 Sep 2021 10:20:42 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10107"; a="307829761" X-IronPort-AV: E=Sophos;i="5.85,295,1624345200"; d="scan'208";a="307829761" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2021 03:20:41 -0700 X-IronPort-AV: E=Sophos;i="5.85,295,1624345200"; d="scan'208";a="553055621" Received: from vmastnak-mobl1.ger.corp.intel.com (HELO localhost) ([10.251.214.245]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2021 03:20:40 -0700 From: Jani Nikula To: Ville Syrjala , intel-gfx@lists.freedesktop.org In-Reply-To: <20210913144440.23008-9-ville.syrjala@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210913144440.23008-1-ville.syrjala@linux.intel.com> <20210913144440.23008-9-ville.syrjala@linux.intel.com> Date: Wed, 15 Sep 2021 13:20:37 +0300 Message-ID: <878rzyyway.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Intel-gfx] [PATCH 08/16] drm/i915: Extract hsw_panel_transcoders() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 13 Sep 2021, Ville Syrjala wrote: > From: Ville Syrj=C3=A4l=C3=A4 > > Extract the "panel transcoder" bitmask into a helper. We'll > have a couple of uses for this later. > > Signed-off-by: Ville Syrj=C3=A4l=C3=A4 Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_display.c | 16 +++++++++++----- > 1 file changed, 11 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/d= rm/i915/display/intel_display.c > index 54107bab4ae6..3848f7963cec 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -5577,21 +5577,27 @@ static bool ilk_get_pipe_config(struct intel_crtc= *crtc, > return ret; > } >=20=20 > +static u8 hsw_panel_transcoders(struct drm_i915_private *i915) > +{ > + u8 panel_transcoder_mask =3D BIT(TRANSCODER_EDP); > + > + if (DISPLAY_VER(i915) >=3D 11) > + panel_transcoder_mask |=3D BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_= 1); > + > + return panel_transcoder_mask; > +} > + > static bool hsw_get_transcoder_state(struct intel_crtc *crtc, > struct intel_crtc_state *pipe_config, > struct intel_display_power_domain_set *power_domain_set) > { > struct drm_device *dev =3D crtc->base.dev; > struct drm_i915_private *dev_priv =3D to_i915(dev); > - unsigned long panel_transcoder_mask =3D BIT(TRANSCODER_EDP); > + u8 panel_transcoder_mask =3D hsw_panel_transcoders(dev_priv); > unsigned long enabled_panel_transcoders =3D 0; > enum transcoder panel_transcoder; > u32 tmp; >=20=20 > - if (DISPLAY_VER(dev_priv) >=3D 11) > - panel_transcoder_mask |=3D > - BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1); > - > /* > * The pipe->transcoder mapping is fixed with the exception of the eDP > * and DSI transcoders handled below. --=20 Jani Nikula, Intel Open Source Graphics Center