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From: Marc Zyngier <maz@kernel.org>
To: Bharat Kumar Gogada <bharatku@xilinx.com>
Cc: "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Frank Wunderlich <frank-w@public-files.de>,
	Thierry Reding <treding@nvidia.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh@kernel.org>, Will Deacon <will@kernel.org>,
	"K. Y. Srinivasan" <kys@microsoft.com>,
	Haiyang Zhang <haiyangz@microsoft.com>,
	Stephen Hemminger <sthemmin@microsoft.com>,
	Michael Kelley <mikelley@microsoft.com>,
	Wei Liu <wei.liu@kernel.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	Marek Vasut <marek.vasut+renesas@gmail.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	Michal Simek <michals@xilinx.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-hyperv@vger.kernel.org" <linux-hyperv@vger.kernel.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org" 
	<linux-mediatek@lists.infradead.org>,
	"linux-renesas-soc@vger.kernel.org" 
	<linux-renesas-soc@vger.kernel.org>,
	"kernel-team@android.com" <kernel-team@android.com>
Subject: Re: [PATCH v2 04/15] PCI: xilinx: Don't allocate extra memory for the MSI capture address
Date: Wed, 24 Mar 2021 12:55:40 +0000	[thread overview]
Message-ID: <878s6ck8xf.wl-maz@kernel.org> (raw)
In-Reply-To: <BYAPR02MB5559D4117C9096D70C5FFE76A5639@BYAPR02MB5559.namprd02.prod.outlook.com>

On Wed, 24 Mar 2021 12:35:58 +0000,
Bharat Kumar Gogada <bharatku@xilinx.com> wrote:
> 
> Thanks Marc for the patch.
> > Subject: [PATCH v2 04/15] PCI: xilinx: Don't allocate extra memory for the
> > MSI capture address
> > 
> > A long cargo-culted behaviour of PCI drivers is to allocate memory to obtain
> > an address that is fed to the controller as the MSI capture address (i.e. the
> > MSI doorbell).
> > 
> > But there is no actual requirement for this address to be RAM.
> > All it needs to be is a suitable aligned address that will
> > *not* be DMA'd to.
> > 
> > Use the physical address of the 'port' data structure as the MSI capture
> > address.
> > 
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > ---
> >  drivers/pci/controller/pcie-xilinx.c | 18 ++++++------------
> >  1 file changed, 6 insertions(+), 12 deletions(-)
> 
> ...
> > -	msg.address_hi = 0;
> > -	msg.address_lo = msg_addr;
> > +	msg.address_hi = upper_32_bits(msg_addr);
> > +	msg.address_lo = lower_32_bits(msg_addr);
> 
> The XILINX_PCIE_REG_MSIBASE2 register expects 4KB aligned address.
> The lower 12-bits are always set to 0 in this register. So we need
> to mask the address while programming address to

Thanks for the heads up, I'll fix this up. Does it work correctly once
the address is aligned?

	M.

-- 
Without deviation from the norm, progress is not possible.

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Bharat Kumar Gogada <bharatku@xilinx.com>
Cc: "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Frank Wunderlich <frank-w@public-files.de>,
	Thierry Reding <treding@nvidia.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh@kernel.org>, Will Deacon <will@kernel.org>,
	"K. Y. Srinivasan" <kys@microsoft.com>,
	Haiyang Zhang <haiyangz@microsoft.com>,
	Stephen Hemminger <sthemmin@microsoft.com>,
	Michael Kelley <mikelley@microsoft.com>,
	Wei Liu <wei.liu@kernel.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	Marek Vasut <marek.vasut+renesas@gmail.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	Michal Simek <michals@xilinx.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-hyperv@vger.kernel.org" <linux-hyperv@vger.kernel.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-renesas-soc@vger.kernel.org"
	<linux-renesas-soc@vger.kernel.org>,
	"kernel-team@android.com" <kernel-team@android.com>
Subject: Re: [PATCH v2 04/15] PCI: xilinx: Don't allocate extra memory for the MSI capture address
Date: Wed, 24 Mar 2021 12:55:40 +0000	[thread overview]
Message-ID: <878s6ck8xf.wl-maz@kernel.org> (raw)
In-Reply-To: <BYAPR02MB5559D4117C9096D70C5FFE76A5639@BYAPR02MB5559.namprd02.prod.outlook.com>

On Wed, 24 Mar 2021 12:35:58 +0000,
Bharat Kumar Gogada <bharatku@xilinx.com> wrote:
> 
> Thanks Marc for the patch.
> > Subject: [PATCH v2 04/15] PCI: xilinx: Don't allocate extra memory for the
> > MSI capture address
> > 
> > A long cargo-culted behaviour of PCI drivers is to allocate memory to obtain
> > an address that is fed to the controller as the MSI capture address (i.e. the
> > MSI doorbell).
> > 
> > But there is no actual requirement for this address to be RAM.
> > All it needs to be is a suitable aligned address that will
> > *not* be DMA'd to.
> > 
> > Use the physical address of the 'port' data structure as the MSI capture
> > address.
> > 
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > ---
> >  drivers/pci/controller/pcie-xilinx.c | 18 ++++++------------
> >  1 file changed, 6 insertions(+), 12 deletions(-)
> 
> ...
> > -	msg.address_hi = 0;
> > -	msg.address_lo = msg_addr;
> > +	msg.address_hi = upper_32_bits(msg_addr);
> > +	msg.address_lo = lower_32_bits(msg_addr);
> 
> The XILINX_PCIE_REG_MSIBASE2 register expects 4KB aligned address.
> The lower 12-bits are always set to 0 in this register. So we need
> to mask the address while programming address to

Thanks for the heads up, I'll fix this up. Does it work correctly once
the address is aligned?

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Bharat Kumar Gogada <bharatku@xilinx.com>
Cc: "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Frank Wunderlich <frank-w@public-files.de>,
	Thierry Reding <treding@nvidia.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh@kernel.org>, Will Deacon <will@kernel.org>,
	"K. Y. Srinivasan" <kys@microsoft.com>,
	Haiyang Zhang <haiyangz@microsoft.com>,
	Stephen Hemminger <sthemmin@microsoft.com>,
	Michael Kelley <mikelley@microsoft.com>,
	Wei Liu <wei.liu@kernel.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	Marek Vasut <marek.vasut+renesas@gmail.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	Michal Simek <michals@xilinx.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-hyperv@vger.kernel.org" <linux-hyperv@vger.kernel.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-renesas-soc@vger.kernel.org"
	<linux-renesas-soc@vger.kernel.org>,
	"kernel-team@android.com" <kernel-team@android.com>
Subject: Re: [PATCH v2 04/15] PCI: xilinx: Don't allocate extra memory for the MSI capture address
Date: Wed, 24 Mar 2021 12:55:40 +0000	[thread overview]
Message-ID: <878s6ck8xf.wl-maz@kernel.org> (raw)
In-Reply-To: <BYAPR02MB5559D4117C9096D70C5FFE76A5639@BYAPR02MB5559.namprd02.prod.outlook.com>

On Wed, 24 Mar 2021 12:35:58 +0000,
Bharat Kumar Gogada <bharatku@xilinx.com> wrote:
> 
> Thanks Marc for the patch.
> > Subject: [PATCH v2 04/15] PCI: xilinx: Don't allocate extra memory for the
> > MSI capture address
> > 
> > A long cargo-culted behaviour of PCI drivers is to allocate memory to obtain
> > an address that is fed to the controller as the MSI capture address (i.e. the
> > MSI doorbell).
> > 
> > But there is no actual requirement for this address to be RAM.
> > All it needs to be is a suitable aligned address that will
> > *not* be DMA'd to.
> > 
> > Use the physical address of the 'port' data structure as the MSI capture
> > address.
> > 
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > ---
> >  drivers/pci/controller/pcie-xilinx.c | 18 ++++++------------
> >  1 file changed, 6 insertions(+), 12 deletions(-)
> 
> ...
> > -	msg.address_hi = 0;
> > -	msg.address_lo = msg_addr;
> > +	msg.address_hi = upper_32_bits(msg_addr);
> > +	msg.address_lo = lower_32_bits(msg_addr);
> 
> The XILINX_PCIE_REG_MSIBASE2 register expects 4KB aligned address.
> The lower 12-bits are always set to 0 in this register. So we need
> to mask the address while programming address to

Thanks for the heads up, I'll fix this up. Does it work correctly once
the address is aligned?

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-03-24 12:56 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-22 18:45 [PATCH v2 00/15] PCI/MSI: Getting rid of msi_controller, and other cleanups Marc Zyngier
2021-03-22 18:45 ` Marc Zyngier
2021-03-22 18:45 ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 01/15] PCI: tegra: Convert to MSI domains Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 02/15] PCI: rcar: Don't allocate extra memory for the MSI capture address Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 03/15] PCI: rcar: Convert to MSI domains Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 04/15] PCI: xilinx: Don't allocate extra memory for the MSI capture address Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-24 12:35   ` Bharat Kumar Gogada
2021-03-24 12:35     ` Bharat Kumar Gogada
2021-03-24 12:35     ` Bharat Kumar Gogada
2021-03-24 12:55     ` Marc Zyngier [this message]
2021-03-24 12:55       ` Marc Zyngier
2021-03-24 12:55       ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 05/15] PCI: xilinx: Convert to MSI domains Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-24 12:42   ` Bharat Kumar Gogada
2021-03-24 12:42     ` Bharat Kumar Gogada
2021-03-24 12:42     ` Bharat Kumar Gogada
2021-03-24 13:15     ` Marc Zyngier
2021-03-24 13:15       ` Marc Zyngier
2021-03-24 13:15       ` Marc Zyngier
2021-03-24 13:56       ` Bharat Kumar Gogada
2021-03-24 13:56         ` Bharat Kumar Gogada
2021-03-24 13:56         ` Bharat Kumar Gogada
2021-03-24 14:45         ` Marc Zyngier
2021-03-24 14:45           ` Marc Zyngier
2021-03-24 14:45           ` Marc Zyngier
2021-03-25  4:13           ` Bharat Kumar Gogada
2021-03-25  4:13             ` Bharat Kumar Gogada
2021-03-25  4:13             ` Bharat Kumar Gogada
2021-03-22 18:46 ` [PATCH v2 06/15] PCI: hv: Drop msi_controller structure Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 07/15] PCI/MSI: Drop use of msi_controller from core code Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 08/15] PCI/MSI: Kill msi_controller structure Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 09/15] PCI/MSI: Kill default_teardown_msi_irqs() Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 10/15] PCI/MSI: Let PCI host bridges declare their lack of MSI handling Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 11/15] PCI: mediatek: Advertise " Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 12/15] PCI/MSI: Let PCI host bridges declare their reliance on MSI domains Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-23 11:45   ` Robin Murphy
2021-03-23 11:45     ` Robin Murphy
2021-03-23 11:45     ` Robin Murphy
2021-03-23 18:09     ` Marc Zyngier
2021-03-23 18:09       ` Marc Zyngier
2021-03-23 18:09       ` Marc Zyngier
2021-03-23 19:04       ` Robin Murphy
2021-03-23 19:04         ` Robin Murphy
2021-03-23 19:04         ` Robin Murphy
2021-03-24 13:19       ` Lorenzo Pieralisi
2021-03-24 13:19         ` Lorenzo Pieralisi
2021-03-24 13:19         ` Lorenzo Pieralisi
2021-03-24 16:11         ` Marc Zyngier
2021-03-24 16:11           ` Marc Zyngier
2021-03-24 16:11           ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 13/15] PCI/MSI: Make pci_host_common_probe() declare its " Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 14/15] PCI/MSI: Document the various ways of ending up with NO_MSI Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46 ` [PATCH v2 15/15] PCI: Refactor HT advertising of NO_MSI flag Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier
2021-03-22 18:46   ` Marc Zyngier

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