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From:   Thomas Gleixner <tglx@linutronix.de>
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To:     Xin Li <xin3.li@intel.com>, linux-kernel@vger.kernel.org,
        x86@kernel.org, kvm@vger.kernel.org
Cc:     mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
        hpa@zytor.com, peterz@infradead.org, andrew.cooper3@citrix.com,
        seanjc@google.com, pbonzini@redhat.com, ravi.v.shankar@intel.com,
        jiangshanlai@gmail.com, shan.kang@intel.com
Subject: Re: [PATCH v8 24/33] x86/fred: disallow the swapgs instruction when
 FRED is enabled
In-Reply-To: <20230410081438.1750-25-xin3.li@intel.com>
References: <20230410081438.1750-1-xin3.li@intel.com>
 <20230410081438.1750-25-xin3.li@intel.com>
Date:   Mon, 05 Jun 2023 15:47:20 +0200
Message-ID: <87a5xe6mxj.ffs@tglx>
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On Mon, Apr 10 2023 at 01:14, Xin Li wrote:
> From: "H. Peter Anvin (Intel)" <hpa@zytor.com>
>
> The FRED architecture establishes the full supervisor/user through:
> 1) FRED event delivery swaps the value of the GS base address and
>    that of the IA32_KERNEL_GS_BASE MSR.
> 2) ERETU swaps the value of the GS base address and that of the
>    IA32_KERNEL_GS_BASE MSR.
> Thus, the swapgs instruction is disallowed when FRED is enabled,
> otherwise it causes #UD.

Which does not explain why writing directly to the IA32_KERNEL_GS_BASE
MSR is doing the right thing.

Thanks,

        tglx