From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0195C433ED for ; Wed, 19 May 2021 00:26:31 +0000 (UTC) Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by mail.kernel.org (Postfix) with ESMTP id 4AA3461209 for ; Wed, 19 May 2021 00:26:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4AA3461209 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ellerman.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=owner-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix) id AAAF78E0060; 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Wed, 19 May 2021 10:26:24 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ellerman.id.au; s=201909; t=1621383985; bh=Um1Dqv6AstXHBvsMIu67+mf10jU6QyH/8DtdTg8oTfo=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=ZdlZTEFt0wQgPepbOySCe0puh044kqZobeuW9eaOTZWMnmWv6N59VRf/56cBYDgUX /0L+rzDASmQtbKfLGD7y/39rSGcxHbBgIcnfTVIBtl+eh/O1R/CZCxyfHeYuwqZrE6 oN7YJzEeKH1PuJ9WHr6ni+BjF7+8iRv8R3oooZUkWSF4S+P19YSuotlO+Tl4r2i8Dc cjHDY5g8XoEOcikwvwUVj8u9Bx6EPMLTa2QAsJk/B9PWYYGsYE9dj07drw7GFStvof FENLPC3RWqToGqp/zhOSm7PHdS31p9tcKSk8kgfZgIXRbJlykNgRLi03Esk9pDlV7n xzuEx6jdXHuGg== From: Michael Ellerman To: Guenter Roeck , "Aneesh Kumar K.V" Cc: linux-mm@kvack.org, akpm@linux-foundation.org, linuxppc-dev@lists.ozlabs.org, kaleshsingh@google.com, npiggin@gmail.com, joel@joelfernandes.org, Christophe Leroy Subject: Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument In-Reply-To: References: <20210422054323.150993-1-aneesh.kumar@linux.ibm.com> <20210422054323.150993-6-aneesh.kumar@linux.ibm.com> <20210515163525.GA1106462@roeck-us.net> <87pmxpqxb1.fsf@linux.ibm.com> Date: Wed, 19 May 2021 10:26:22 +1000 Message-ID: <87a6ork1qp.fsf@mpe.ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Authentication-Results: imf19.hostedemail.com; dkim=pass header.d=ellerman.id.au header.s=201909 header.b=ZdlZTEFt; dmarc=none; spf=pass (imf19.hostedemail.com: domain of mpe@ellerman.id.au designates 203.11.71.1 as permitted sender) smtp.mailfrom=mpe@ellerman.id.au X-Rspamd-Server: rspam05 X-Rspamd-Queue-Id: 48D5C90009E8 X-Stat-Signature: pstxdn8qsg8busci5xstedp9cdh9aytt X-HE-Tag: 1621383989-133258 X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: Guenter Roeck writes: > On 5/17/21 6:55 AM, Aneesh Kumar K.V wrote: >> Guenter Roeck writes: >>=20 >>> On 5/17/21 1:40 AM, Aneesh Kumar K.V wrote: >>>> On 5/15/21 10:05 PM, Guenter Roeck wrote: >>>>> On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote: >>=20 >> ... >>=20 >>>>> =C2=A0 extern void radix__local_flush_all_mm(struct mm_struct *mm); >>>>>> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/po= werpc/include/asm/book3s/64/tlbflush.h >>>>>> index 215973b4cb26..f9f8a3a264f7 100644 >>>>>> --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h >>>>>> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h >>>>>> @@ -45,13 +45,30 @@ static inline void tlbiel_all_lpid(bool radix) >>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 hash__tlbiel= _all(TLB_INVAL_SCOPE_LPID); >>>>>> =C2=A0 } >>>>>> +static inline void flush_pmd_tlb_pwc_range(struct vm_area_struct *v= ma, >>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ^^^^ >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned= long start, >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned= long end, >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool flu= sh_pwc) >>>>>> +{ >>>>>> +=C2=A0=C2=A0=C2=A0 if (radix_enabled()) >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return radix__flush_pmd_= tlb_range(vma, start, end, flush_pwc); >>>>>> +=C2=A0=C2=A0=C2=A0 return hash__flush_tlb_range(vma, start, end); >>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ^^^^^^^^^^^^^^^^^^^= ^^^^^^^^^^^^^^^^^^^^^^^^^^^ >>>>> >>>>>> +} >>>> >>>> In this specific case we won't have=C2=A0 build errors because, >>>> >>>> static inline void hash__flush_tlb_range(struct vm_area_struct *vma, >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned long start,= unsigned long end) >>>> { >>>> >>> >>> Sorry, you completely lost me. >>> >>> Building parisc:allnoconfig ... failed >>> -------------- >>> Error log: >>> In file included from arch/parisc/include/asm/cacheflush.h:7, >>> from include/linux/highmem.h:12, >>> from include/linux/pagemap.h:11, >>> from include/linux/ksm.h:13, >>> from mm/mremap.c:14: >>> mm/mremap.c: In function 'flush_pte_tlb_pwc_range': >>> arch/parisc/include/asm/tlbflush.h:20:2: error: 'return' with a value, = in function returning void >>=20 >> As replied here >> https://lore.kernel.org/mm-commits/8eedb441-a612-1ec8-8bf7-b40184de9f6f@= linux.ibm.com/ >>=20 >> That was the generic header change in the patch. I was commenting about = the >> ppc64 specific change causing build failures. > > Ah, sorry. I wasn't aware that the following is valid C code > > void f1() > { > return f2(); > ^^^^^^ > } > > as long as f2() is void as well. Confusing, but we live and learn. It might be valid, but it's still bad IMHO. It's confusing to readers, and serves no useful purpose. cheers From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C56CC433ED for ; Wed, 19 May 2021 00:26:56 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6CA3961244 for ; Wed, 19 May 2021 00:26:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6CA3961244 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ellerman.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4FlDFp1R8Hz3bT7 for ; Wed, 19 May 2021 10:26:54 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ellerman.id.au header.i=@ellerman.id.au header.a=rsa-sha256 header.s=201909 header.b=ZdlZTEFt; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=ellerman.id.au (client-ip=203.11.71.1; helo=ozlabs.org; envelope-from=mpe@ellerman.id.au; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ellerman.id.au header.i=@ellerman.id.au header.a=rsa-sha256 header.s=201909 header.b=ZdlZTEFt; dkim-atps=neutral Received: from ozlabs.org (bilbo.ozlabs.org [203.11.71.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4FlDFH2zsFz2xvc for ; Wed, 19 May 2021 10:26:26 +1000 (AEST) Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 4FlDFD2w1Jz9sRf; Wed, 19 May 2021 10:26:24 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ellerman.id.au; s=201909; t=1621383985; bh=Um1Dqv6AstXHBvsMIu67+mf10jU6QyH/8DtdTg8oTfo=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=ZdlZTEFt0wQgPepbOySCe0puh044kqZobeuW9eaOTZWMnmWv6N59VRf/56cBYDgUX /0L+rzDASmQtbKfLGD7y/39rSGcxHbBgIcnfTVIBtl+eh/O1R/CZCxyfHeYuwqZrE6 oN7YJzEeKH1PuJ9WHr6ni+BjF7+8iRv8R3oooZUkWSF4S+P19YSuotlO+Tl4r2i8Dc cjHDY5g8XoEOcikwvwUVj8u9Bx6EPMLTa2QAsJk/B9PWYYGsYE9dj07drw7GFStvof FENLPC3RWqToGqp/zhOSm7PHdS31p9tcKSk8kgfZgIXRbJlykNgRLi03Esk9pDlV7n xzuEx6jdXHuGg== From: Michael Ellerman To: Guenter Roeck , "Aneesh Kumar K.V" Subject: Re: [PATCH v5 5/9] powerpc/mm/book3s64: Update tlb flush routines to take a page walk cache flush argument In-Reply-To: References: <20210422054323.150993-1-aneesh.kumar@linux.ibm.com> <20210422054323.150993-6-aneesh.kumar@linux.ibm.com> <20210515163525.GA1106462@roeck-us.net> <87pmxpqxb1.fsf@linux.ibm.com> Date: Wed, 19 May 2021 10:26:22 +1000 Message-ID: <87a6ork1qp.fsf@mpe.ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: npiggin@gmail.com, linux-mm@kvack.org, kaleshsingh@google.com, joel@joelfernandes.org, akpm@linux-foundation.org, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Guenter Roeck writes: > On 5/17/21 6:55 AM, Aneesh Kumar K.V wrote: >> Guenter Roeck writes: >>=20 >>> On 5/17/21 1:40 AM, Aneesh Kumar K.V wrote: >>>> On 5/15/21 10:05 PM, Guenter Roeck wrote: >>>>> On Thu, Apr 22, 2021 at 11:13:19AM +0530, Aneesh Kumar K.V wrote: >>=20 >> ... >>=20 >>>>> =C2=A0 extern void radix__local_flush_all_mm(struct mm_struct *mm); >>>>>> diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/po= werpc/include/asm/book3s/64/tlbflush.h >>>>>> index 215973b4cb26..f9f8a3a264f7 100644 >>>>>> --- a/arch/powerpc/include/asm/book3s/64/tlbflush.h >>>>>> +++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h >>>>>> @@ -45,13 +45,30 @@ static inline void tlbiel_all_lpid(bool radix) >>>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 hash__tlbiel= _all(TLB_INVAL_SCOPE_LPID); >>>>>> =C2=A0 } >>>>>> +static inline void flush_pmd_tlb_pwc_range(struct vm_area_struct *v= ma, >>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ^^^^ >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned= long start, >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned= long end, >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 bool flu= sh_pwc) >>>>>> +{ >>>>>> +=C2=A0=C2=A0=C2=A0 if (radix_enabled()) >>>>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return radix__flush_pmd_= tlb_range(vma, start, end, flush_pwc); >>>>>> +=C2=A0=C2=A0=C2=A0 return hash__flush_tlb_range(vma, start, end); >>>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ^^^^^^^^^^^^^^^^^^^= ^^^^^^^^^^^^^^^^^^^^^^^^^^^ >>>>> >>>>>> +} >>>> >>>> In this specific case we won't have=C2=A0 build errors because, >>>> >>>> static inline void hash__flush_tlb_range(struct vm_area_struct *vma, >>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned long start,= unsigned long end) >>>> { >>>> >>> >>> Sorry, you completely lost me. >>> >>> Building parisc:allnoconfig ... failed >>> -------------- >>> Error log: >>> In file included from arch/parisc/include/asm/cacheflush.h:7, >>> from include/linux/highmem.h:12, >>> from include/linux/pagemap.h:11, >>> from include/linux/ksm.h:13, >>> from mm/mremap.c:14: >>> mm/mremap.c: In function 'flush_pte_tlb_pwc_range': >>> arch/parisc/include/asm/tlbflush.h:20:2: error: 'return' with a value, = in function returning void >>=20 >> As replied here >> https://lore.kernel.org/mm-commits/8eedb441-a612-1ec8-8bf7-b40184de9f6f@= linux.ibm.com/ >>=20 >> That was the generic header change in the patch. I was commenting about = the >> ppc64 specific change causing build failures. > > Ah, sorry. I wasn't aware that the following is valid C code > > void f1() > { > return f2(); > ^^^^^^ > } > > as long as f2() is void as well. Confusing, but we live and learn. It might be valid, but it's still bad IMHO. It's confusing to readers, and serves no useful purpose. cheers