From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
To: "Kang\, Luwei" <luwei.kang@intel.com>,
Peter Zijlstra <peterz@infradead.org>
Cc: "kvm\@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-kernel\@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"pbonzini\@redhat.com" <pbonzini@redhat.com>,
"rkrcmar\@redhat.com" <rkrcmar@redhat.com>, "Christopherson\,
Sean J" <sean.j.christopherson@intel.com>,
"vkuznets\@redhat.com" <vkuznets@redhat.com>,
"wanpengli\@tencent.com" <wanpengli@tencent.com>,
"jmattson\@google.com" <jmattson@google.com>,
"joro\@8bytes.org" <joro@8bytes.org>,
"tglx\@linutronix.de" <tglx@linutronix.de>,
"mingo\@redhat.com" <mingo@redhat.com>,
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"x86\@kernel.org" <x86@kernel.org>,
"ak\@linux.intel.com" <ak@linux.intel.com>,
"thomas.lendacky\@amd.com" <thomas.lendacky@amd.com>,
"acme\@kernel.org" <acme@kernel.org>,
"mark.rutland\@arm.com" <mark.rutland@arm.com>,
"jolsa\@redhat.com" <jolsa@redhat.com>,
"namhyung\@kernel.org" <namhyung@kernel.org>,
alexander.shishkin@linux.intel.com
Subject: RE: [PATCH v1 8/8] perf/x86: Add event owner check when PEBS output to Intel PT
Date: Thu, 31 Oct 2019 09:39:24 +0200 [thread overview]
Message-ID: <87bltxfjo3.fsf@ashishki-desk.ger.corp.intel.com> (raw)
In-Reply-To: <82D7661F83C1A047AF7DC287873BF1E173836317@SHSMSX104.ccr.corp.intel.com>
"Kang, Luwei" <luwei.kang@intel.com> writes:
>> Then how does KVM deal with the host using PT? You can't just steal PT.
>
> Intel PT in virtualization can work in system and host_guest mode.
> In system mode (default), the trace produced by host and guest will be saved in host PT buffer. Intel PT will not be exposed to guest in this mode.
> In host_guest mode, Intel PT will be exposed to guest and guest can use PT like native. The value of host PT register will be saved and guest PT register value will be restored during VM-entry. Both trace of host and guest are exported to their respective PT buffer. The host PT buffer not include guest trace in this mode.
IOW, it will steal PT from the host.
Regards,
--
Alex
next prev parent reply other threads:[~2019-10-31 7:39 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-27 23:11 [PATCH v1 0/8] PEBS enabling in KVM guest Luwei Kang
2019-10-27 23:11 ` [PATCH v1 1/8] KVM: x86: Add base address parameter for get_fixed_pmc function Luwei Kang
2019-10-27 23:11 ` [PATCH v1 2/8] KVM: x86: PEBS output to Intel PT MSRs emulation Luwei Kang
2019-10-29 15:02 ` Peter Zijlstra
2019-10-30 4:06 ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 3/8] KVM: x86: Allocate performance counter for PEBS event Luwei Kang
2019-10-29 14:46 ` Peter Zijlstra
2019-10-30 4:06 ` Kang, Luwei
2019-10-30 6:42 ` Alexander Shishkin
2019-10-30 6:49 ` Kang, Luwei
2019-10-30 9:51 ` Peter Zijlstra
2019-10-30 9:50 ` Peter Zijlstra
2019-10-30 9:49 ` Peter Zijlstra
2019-10-30 13:41 ` Alexander Shishkin
2019-10-31 11:10 ` Kang, Luwei
2019-11-06 7:44 ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 4/8] KVM: x86: Aviod clear the PEBS counter when PEBS enabled in guest Luwei Kang
2019-10-29 14:55 ` Peter Zijlstra
2019-10-30 4:06 ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 5/8] KVM: X86: Expose PDCM cpuid to guest Luwei Kang
2019-10-27 23:11 ` [PATCH v1 6/8] KVM: X86: MSR_IA32_PERF_CAPABILITIES MSR emulation Luwei Kang
2019-10-27 23:11 ` [PATCH v1 7/8] KVM: x86: Expose PEBS feature to guest Luwei Kang
2019-10-29 15:05 ` Peter Zijlstra
2019-10-30 4:07 ` Kang, Luwei
2019-10-30 9:52 ` Peter Zijlstra
2019-10-31 4:21 ` Kang, Luwei
2019-10-27 23:11 ` [PATCH v1 8/8] perf/x86: Add event owner check when PEBS output to Intel PT Luwei Kang
2019-10-29 15:13 ` Peter Zijlstra
2019-10-30 4:07 ` Kang, Luwei
2019-10-30 9:54 ` Peter Zijlstra
2019-10-31 6:55 ` Kang, Luwei
2019-10-31 7:39 ` Alexander Shishkin [this message]
2019-10-31 10:31 ` Kang, Luwei
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