From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934541AbeEIKly (ORCPT ); Wed, 9 May 2018 06:41:54 -0400 Received: from mga06.intel.com ([134.134.136.31]:54991 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932570AbeEIKlw (ORCPT ); Wed, 9 May 2018 06:41:52 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,381,1520924400"; d="scan'208";a="53677840" From: Jani Nikula To: Colin King , Joonas Lahtinen , Rodrigo Vivi , David Airlie , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH][V2] drm/i915/dp: fix spelling mistakes: "seqeuncer" and "seqeuencer" In-Reply-To: <20180509101606.17483-1-colin.king@canonical.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20180509101606.17483-1-colin.king@canonical.com> Date: Wed, 09 May 2018 13:44:27 +0300 Message-ID: <87bmdp3y7o.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 09 May 2018, Colin King wrote: > From: Colin Ian King > > Trivial fix to spelling mistakes in WARN warning message text and > in comments: > > "seqeuncer", "seqeuencer" -> "sequencer" > > Signed-off-by: Colin Ian King Reviewed-by: Jani Nikula (Waiting for the CI runs before merging.) > --- > > V2: Also fix seqeuencer in comments > > --- > drivers/gpu/drm/i915/intel_dp.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index dde92e4af5d3..2cc58596ff5a 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -513,7 +513,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp) > uint32_t DP; > > if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN, > - "skipping pipe %c power seqeuncer kick due to port %c being active\n", > + "skipping pipe %c power sequencer kick due to port %c being active\n", > pipe_name(pipe), port_name(intel_dig_port->base.port))) > return; > > @@ -554,7 +554,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp) > /* > * Similar magic as in intel_dp_enable_port(). > * We _must_ do this port enable + disable trick > - * to make this power seqeuencer lock onto the port. > + * to make this power sequencer lock onto the port. > * Otherwise even VDD force bit won't work. > */ > I915_WRITE(intel_dp->output_reg, DP); > @@ -3066,11 +3066,11 @@ static void vlv_detach_power_sequencer(struct intel_dp *intel_dp) > edp_panel_vdd_off_sync(intel_dp); > > /* > - * VLV seems to get confused when multiple power seqeuencers > + * VLV seems to get confused when multiple power sequencers > * have the same port selected (even if only one has power/vdd > * enabled). The failure manifests as vlv_wait_port_ready() failing > * CHV on the other hand doesn't seem to mind having the same port > - * selected in multiple power seqeuencers, but let's clear the > + * selected in multiple power sequencers, but let's clear the > * port select always when logically disconnecting a power sequencer > * from a port. > */ > @@ -5698,7 +5698,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, > > /* > * On some VLV machines the BIOS can leave the VDD > - * enabled even on power seqeuencers which aren't > + * enabled even on power sequencers which aren't > * hooked up to any port. This would mess up the > * power domain tracking the first time we pick > * one of these power sequencers for use since > @@ -5706,7 +5706,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, > * already on and therefore wouldn't grab the power > * domain reference. Disable VDD first to avoid this. > * This also avoids spuriously turning the VDD on as > - * soon as the new power seqeuencer gets initialized. > + * soon as the new power sequencer gets initialized. > */ > if (force_disable_vdd) { > u32 pp = ironlake_get_pp_control(intel_dp); -- Jani Nikula, Intel Open Source Technology Center From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Date: Wed, 09 May 2018 10:44:27 +0000 Subject: Re: [PATCH][V2] drm/i915/dp: fix spelling mistakes: "seqeuncer" and "seqeuencer" Message-Id: <87bmdp3y7o.fsf@intel.com> List-Id: References: <20180509101606.17483-1-colin.king@canonical.com> In-Reply-To: <20180509101606.17483-1-colin.king@canonical.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Colin King , Joonas Lahtinen , Rodrigo Vivi , David Airlie , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org On Wed, 09 May 2018, Colin King wrote: > From: Colin Ian King > > Trivial fix to spelling mistakes in WARN warning message text and > in comments: > > "seqeuncer", "seqeuencer" -> "sequencer" > > Signed-off-by: Colin Ian King Reviewed-by: Jani Nikula (Waiting for the CI runs before merging.) > --- > > V2: Also fix seqeuencer in comments > > --- > drivers/gpu/drm/i915/intel_dp.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index dde92e4af5d3..2cc58596ff5a 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -513,7 +513,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp) > uint32_t DP; > > if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN, > - "skipping pipe %c power seqeuncer kick due to port %c being active\n", > + "skipping pipe %c power sequencer kick due to port %c being active\n", > pipe_name(pipe), port_name(intel_dig_port->base.port))) > return; > > @@ -554,7 +554,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp) > /* > * Similar magic as in intel_dp_enable_port(). > * We _must_ do this port enable + disable trick > - * to make this power seqeuencer lock onto the port. > + * to make this power sequencer lock onto the port. > * Otherwise even VDD force bit won't work. > */ > I915_WRITE(intel_dp->output_reg, DP); > @@ -3066,11 +3066,11 @@ static void vlv_detach_power_sequencer(struct intel_dp *intel_dp) > edp_panel_vdd_off_sync(intel_dp); > > /* > - * VLV seems to get confused when multiple power seqeuencers > + * VLV seems to get confused when multiple power sequencers > * have the same port selected (even if only one has power/vdd > * enabled). The failure manifests as vlv_wait_port_ready() failing > * CHV on the other hand doesn't seem to mind having the same port > - * selected in multiple power seqeuencers, but let's clear the > + * selected in multiple power sequencers, but let's clear the > * port select always when logically disconnecting a power sequencer > * from a port. > */ > @@ -5698,7 +5698,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, > > /* > * On some VLV machines the BIOS can leave the VDD > - * enabled even on power seqeuencers which aren't > + * enabled even on power sequencers which aren't > * hooked up to any port. This would mess up the > * power domain tracking the first time we pick > * one of these power sequencers for use since > @@ -5706,7 +5706,7 @@ intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp, > * already on and therefore wouldn't grab the power > * domain reference. Disable VDD first to avoid this. > * This also avoids spuriously turning the VDD on as > - * soon as the new power seqeuencer gets initialized. > + * soon as the new power sequencer gets initialized. > */ > if (force_disable_vdd) { > u32 pp = ironlake_get_pp_control(intel_dp); -- Jani Nikula, Intel Open Source Technology Center From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH][V2] drm/i915/dp: fix spelling mistakes: "seqeuncer" and "seqeuencer" Date: Wed, 09 May 2018 13:44:27 +0300 Message-ID: <87bmdp3y7o.fsf@intel.com> References: <20180509101606.17483-1-colin.king@canonical.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20180509101606.17483-1-colin.king@canonical.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Colin King , Joonas Lahtinen , Rodrigo Vivi , David Airlie , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: dri-devel@lists.freedesktop.org T24gV2VkLCAwOSBNYXkgMjAxOCwgQ29saW4gS2luZyA8Y29saW4ua2luZ0BjYW5vbmljYWwuY29t PiB3cm90ZToKPiBGcm9tOiBDb2xpbiBJYW4gS2luZyA8Y29saW4ua2luZ0BjYW5vbmljYWwuY29t Pgo+Cj4gVHJpdmlhbCBmaXggdG8gc3BlbGxpbmcgbWlzdGFrZXMgaW4gV0FSTiB3YXJuaW5nIG1l c3NhZ2UgdGV4dCBhbmQKPiBpbiBjb21tZW50czoKPgo+ICJzZXFldW5jZXIiLCAic2VxZXVlbmNl ciIgLT4gInNlcXVlbmNlciIKPgo+IFNpZ25lZC1vZmYtYnk6IENvbGluIElhbiBLaW5nIDxjb2xp bi5raW5nQGNhbm9uaWNhbC5jb20+CgpSZXZpZXdlZC1ieTogSmFuaSBOaWt1bGEgPGphbmkubmlr dWxhQGludGVsLmNvbT4KCihXYWl0aW5nIGZvciB0aGUgQ0kgcnVucyBiZWZvcmUgbWVyZ2luZy4p Cgo+IC0tLQo+Cj4gVjI6IEFsc28gZml4IHNlcWV1ZW5jZXIgaW4gY29tbWVudHMKPgo+IC0tLQo+ ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kcC5jIHwgMTIgKysrKysrLS0tLS0tCj4gIDEg ZmlsZSBjaGFuZ2VkLCA2IGluc2VydGlvbnMoKyksIDYgZGVsZXRpb25zKC0pCj4KPiBkaWZmIC0t Z2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHAuYyBiL2RyaXZlcnMvZ3B1L2RybS9p OTE1L2ludGVsX2RwLmMKPiBpbmRleCBkZGU5MmU0YWY1ZDMuLjJjYzU4NTk2ZmY1YSAxMDA2NDQK PiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kcC5jCj4gKysrIGIvZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfZHAuYwo+IEBAIC01MTMsNyArNTEzLDcgQEAgdmx2X3Bvd2VyX3Nl cXVlbmNlcl9raWNrKHN0cnVjdCBpbnRlbF9kcCAqaW50ZWxfZHApCj4gIAl1aW50MzJfdCBEUDsK PiAgCj4gIAlpZiAoV0FSTihJOTE1X1JFQUQoaW50ZWxfZHAtPm91dHB1dF9yZWcpICYgRFBfUE9S VF9FTiwKPiAtCQkgInNraXBwaW5nIHBpcGUgJWMgcG93ZXIgc2VxZXVuY2VyIGtpY2sgZHVlIHRv IHBvcnQgJWMgYmVpbmcgYWN0aXZlXG4iLAo+ICsJCSAic2tpcHBpbmcgcGlwZSAlYyBwb3dlciBz ZXF1ZW5jZXIga2ljayBkdWUgdG8gcG9ydCAlYyBiZWluZyBhY3RpdmVcbiIsCj4gIAkJIHBpcGVf bmFtZShwaXBlKSwgcG9ydF9uYW1lKGludGVsX2RpZ19wb3J0LT5iYXNlLnBvcnQpKSkKPiAgCQly ZXR1cm47Cj4gIAo+IEBAIC01NTQsNyArNTU0LDcgQEAgdmx2X3Bvd2VyX3NlcXVlbmNlcl9raWNr KHN0cnVjdCBpbnRlbF9kcCAqaW50ZWxfZHApCj4gIAkvKgo+ICAJICogU2ltaWxhciBtYWdpYyBh cyBpbiBpbnRlbF9kcF9lbmFibGVfcG9ydCgpLgo+ICAJICogV2UgX211c3RfIGRvIHRoaXMgcG9y dCBlbmFibGUgKyBkaXNhYmxlIHRyaWNrCj4gLQkgKiB0byBtYWtlIHRoaXMgcG93ZXIgc2VxZXVl bmNlciBsb2NrIG9udG8gdGhlIHBvcnQuCj4gKwkgKiB0byBtYWtlIHRoaXMgcG93ZXIgc2VxdWVu Y2VyIGxvY2sgb250byB0aGUgcG9ydC4KPiAgCSAqIE90aGVyd2lzZSBldmVuIFZERCBmb3JjZSBi aXQgd29uJ3Qgd29yay4KPiAgCSAqLwo+ICAJSTkxNV9XUklURShpbnRlbF9kcC0+b3V0cHV0X3Jl ZywgRFApOwo+IEBAIC0zMDY2LDExICszMDY2LDExIEBAIHN0YXRpYyB2b2lkIHZsdl9kZXRhY2hf cG93ZXJfc2VxdWVuY2VyKHN0cnVjdCBpbnRlbF9kcCAqaW50ZWxfZHApCj4gIAllZHBfcGFuZWxf dmRkX29mZl9zeW5jKGludGVsX2RwKTsKPiAgCj4gIAkvKgo+IC0JICogVkxWIHNlZW1zIHRvIGdl dCBjb25mdXNlZCB3aGVuIG11bHRpcGxlIHBvd2VyIHNlcWV1ZW5jZXJzCj4gKwkgKiBWTFYgc2Vl bXMgdG8gZ2V0IGNvbmZ1c2VkIHdoZW4gbXVsdGlwbGUgcG93ZXIgc2VxdWVuY2Vycwo+ICAJICog aGF2ZSB0aGUgc2FtZSBwb3J0IHNlbGVjdGVkIChldmVuIGlmIG9ubHkgb25lIGhhcyBwb3dlci92 ZGQKPiAgCSAqIGVuYWJsZWQpLiBUaGUgZmFpbHVyZSBtYW5pZmVzdHMgYXMgdmx2X3dhaXRfcG9y dF9yZWFkeSgpIGZhaWxpbmcKPiAgCSAqIENIViBvbiB0aGUgb3RoZXIgaGFuZCBkb2Vzbid0IHNl ZW0gdG8gbWluZCBoYXZpbmcgdGhlIHNhbWUgcG9ydAo+IC0JICogc2VsZWN0ZWQgaW4gbXVsdGlw bGUgcG93ZXIgc2VxZXVlbmNlcnMsIGJ1dCBsZXQncyBjbGVhciB0aGUKPiArCSAqIHNlbGVjdGVk IGluIG11bHRpcGxlIHBvd2VyIHNlcXVlbmNlcnMsIGJ1dCBsZXQncyBjbGVhciB0aGUKPiAgCSAq IHBvcnQgc2VsZWN0IGFsd2F5cyB3aGVuIGxvZ2ljYWxseSBkaXNjb25uZWN0aW5nIGEgcG93ZXIg c2VxdWVuY2VyCj4gIAkgKiBmcm9tIGEgcG9ydC4KPiAgCSAqLwo+IEBAIC01Njk4LDcgKzU2OTgs NyBAQCBpbnRlbF9kcF9pbml0X3BhbmVsX3Bvd2VyX3NlcXVlbmNlcl9yZWdpc3RlcnMoc3RydWN0 IGludGVsX2RwICppbnRlbF9kcCwKPiAgCj4gIAkvKgo+ICAJICogT24gc29tZSBWTFYgbWFjaGlu ZXMgdGhlIEJJT1MgY2FuIGxlYXZlIHRoZSBWREQKPiAtCSAqIGVuYWJsZWQgZXZlbiBvbiBwb3dl ciBzZXFldWVuY2VycyB3aGljaCBhcmVuJ3QKPiArCSAqIGVuYWJsZWQgZXZlbiBvbiBwb3dlciBz ZXF1ZW5jZXJzIHdoaWNoIGFyZW4ndAo+ICAJICogaG9va2VkIHVwIHRvIGFueSBwb3J0LiBUaGlz IHdvdWxkIG1lc3MgdXAgdGhlCj4gIAkgKiBwb3dlciBkb21haW4gdHJhY2tpbmcgdGhlIGZpcnN0 IHRpbWUgd2UgcGljawo+ICAJICogb25lIG9mIHRoZXNlIHBvd2VyIHNlcXVlbmNlcnMgZm9yIHVz ZSBzaW5jZQo+IEBAIC01NzA2LDcgKzU3MDYsNyBAQCBpbnRlbF9kcF9pbml0X3BhbmVsX3Bvd2Vy X3NlcXVlbmNlcl9yZWdpc3RlcnMoc3RydWN0IGludGVsX2RwICppbnRlbF9kcCwKPiAgCSAqIGFs cmVhZHkgb24gYW5kIHRoZXJlZm9yZSB3b3VsZG4ndCBncmFiIHRoZSBwb3dlcgo+ICAJICogZG9t YWluIHJlZmVyZW5jZS4gRGlzYWJsZSBWREQgZmlyc3QgdG8gYXZvaWQgdGhpcy4KPiAgCSAqIFRo aXMgYWxzbyBhdm9pZHMgc3B1cmlvdXNseSB0dXJuaW5nIHRoZSBWREQgb24gYXMKPiAtCSAqIHNv b24gYXMgdGhlIG5ldyBwb3dlciBzZXFldWVuY2VyIGdldHMgaW5pdGlhbGl6ZWQuCj4gKwkgKiBz b29uIGFzIHRoZSBuZXcgcG93ZXIgc2VxdWVuY2VyIGdldHMgaW5pdGlhbGl6ZWQuCj4gIAkgKi8K PiAgCWlmIChmb3JjZV9kaXNhYmxlX3ZkZCkgewo+ICAJCXUzMiBwcCA9IGlyb25sYWtlX2dldF9w cF9jb250cm9sKGludGVsX2RwKTsKCi0tIApKYW5pIE5pa3VsYSwgSW50ZWwgT3BlbiBTb3VyY2Ug VGVjaG5vbG9neSBDZW50ZXIKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0 b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJp LWRldmVsCg==