From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D910C433DB for ; Tue, 12 Jan 2021 17:51:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DA474222F9 for ; Tue, 12 Jan 2021 17:51:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DA474222F9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9480589B97; Tue, 12 Jan 2021 17:51:50 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3B18789B97; Tue, 12 Jan 2021 17:51:49 +0000 (UTC) IronPort-SDR: E4lrsPt2tRtrCdg708BLXkwtTUnu9ZCAIXBM+MALAd4Uqicx7be+ae51XjFKdoyQ6NRJWnMSsP xVFX/H9mSsLA== X-IronPort-AV: E=McAfee;i="6000,8403,9862"; a="242152447" X-IronPort-AV: E=Sophos;i="5.79,342,1602572400"; d="scan'208";a="242152447" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2021 09:51:47 -0800 IronPort-SDR: wzOWCNLxNuV6DkQgDKdVA2QSjfaVIm4iTPqbNI4skbeyopQhPCz8bmF8jjCh6Pf//AK5eFieoO UTa5H3pfE8RA== X-IronPort-AV: E=Sophos;i="5.79,342,1602572400"; d="scan'208";a="381510580" Received: from vbucoci-mobl1.ger.corp.intel.com (HELO localhost) ([10.249.39.237]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2021 09:51:43 -0800 From: Jani Nikula To: Sean Paul , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Anshuman Gupta Subject: Re: [PATCH] drm/i915/hdcp: Disable the QSES check for HDCP 1.4 over MST In-Reply-To: <20210106223909.34476-1-sean@poorly.run> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210106223909.34476-1-sean@poorly.run> Date: Tue, 12 Jan 2021 19:51:39 +0200 Message-ID: <87czyat55g.fsf@intel.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: , David Airlie , Sean Paul , Rodrigo Vivi Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Anshuman, please review. BR, Jani. On Wed, 06 Jan 2021, Sean Paul wrote: > From: Sean Paul > > The HDCP 1.4 spec does not require the QUERY_STREAM_ENCRYPTION_STATUS > check, it was always a nice-to-have. After deploying this across various > devices, we've determined that some MST bridge chips do not properly > support this call for HDCP 1.4 (namely Synaptics and Realtek). > > I had considered creating a quirk for this, but I think it's more > prudent to just disable the check entirely since I don't have an idea > how widespread support is. > > Signed-off-by: Sean Paul > --- > drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 26 +------------------- > 1 file changed, 1 insertion(+), 25 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > index 03424d20e9f7..b6a9606bf09a 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > @@ -640,30 +640,6 @@ intel_dp_mst_hdcp_toggle_signalling(struct intel_digital_port *dig_port, > return ret; > } > > -static > -bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port, > - struct intel_connector *connector) > -{ > - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); > - struct intel_dp *intel_dp = &dig_port->dp; > - struct drm_dp_query_stream_enc_status_ack_reply reply; > - int ret; > - > - if (!intel_dp_hdcp_check_link(dig_port, connector)) > - return false; > - > - ret = drm_dp_send_query_stream_enc_status(&intel_dp->mst_mgr, > - connector->port, &reply); > - if (ret) { > - drm_dbg_kms(&i915->drm, > - "[CONNECTOR:%d:%s] failed QSES ret=%d\n", > - connector->base.base.id, connector->base.name, ret); > - return false; > - } > - > - return reply.auth_completed && reply.encryption_enabled; > -} > - > static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = { > .write_an_aksv = intel_dp_hdcp_write_an_aksv, > .read_bksv = intel_dp_hdcp_read_bksv, > @@ -674,7 +650,7 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = { > .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo, > .read_v_prime_part = intel_dp_hdcp_read_v_prime_part, > .toggle_signalling = intel_dp_mst_hdcp_toggle_signalling, > - .check_link = intel_dp_mst_hdcp_check_link, > + .check_link = intel_dp_hdcp_check_link, > .hdcp_capable = intel_dp_hdcp_capable, > > .protocol = HDCP_PROTOCOL_DP, -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29C6FC433E0 for ; Tue, 12 Jan 2021 17:51:56 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D2EB8222F9 for ; Tue, 12 Jan 2021 17:51:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D2EB8222F9 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C130489BA3; Tue, 12 Jan 2021 17:51:50 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3B18789B97; Tue, 12 Jan 2021 17:51:49 +0000 (UTC) IronPort-SDR: E4lrsPt2tRtrCdg708BLXkwtTUnu9ZCAIXBM+MALAd4Uqicx7be+ae51XjFKdoyQ6NRJWnMSsP xVFX/H9mSsLA== X-IronPort-AV: E=McAfee;i="6000,8403,9862"; a="242152447" X-IronPort-AV: E=Sophos;i="5.79,342,1602572400"; d="scan'208";a="242152447" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2021 09:51:47 -0800 IronPort-SDR: wzOWCNLxNuV6DkQgDKdVA2QSjfaVIm4iTPqbNI4skbeyopQhPCz8bmF8jjCh6Pf//AK5eFieoO UTa5H3pfE8RA== X-IronPort-AV: E=Sophos;i="5.79,342,1602572400"; d="scan'208";a="381510580" Received: from vbucoci-mobl1.ger.corp.intel.com (HELO localhost) ([10.249.39.237]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2021 09:51:43 -0800 From: Jani Nikula To: Sean Paul , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, Anshuman Gupta In-Reply-To: <20210106223909.34476-1-sean@poorly.run> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210106223909.34476-1-sean@poorly.run> Date: Tue, 12 Jan 2021 19:51:39 +0200 Message-ID: <87czyat55g.fsf@intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH] drm/i915/hdcp: Disable the QSES check for HDCP 1.4 over MST X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: , David Airlie , Sean Paul Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Anshuman, please review. BR, Jani. On Wed, 06 Jan 2021, Sean Paul wrote: > From: Sean Paul > > The HDCP 1.4 spec does not require the QUERY_STREAM_ENCRYPTION_STATUS > check, it was always a nice-to-have. After deploying this across various > devices, we've determined that some MST bridge chips do not properly > support this call for HDCP 1.4 (namely Synaptics and Realtek). > > I had considered creating a quirk for this, but I think it's more > prudent to just disable the check entirely since I don't have an idea > how widespread support is. > > Signed-off-by: Sean Paul > --- > drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 26 +------------------- > 1 file changed, 1 insertion(+), 25 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > index 03424d20e9f7..b6a9606bf09a 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c > @@ -640,30 +640,6 @@ intel_dp_mst_hdcp_toggle_signalling(struct intel_digital_port *dig_port, > return ret; > } > > -static > -bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port, > - struct intel_connector *connector) > -{ > - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); > - struct intel_dp *intel_dp = &dig_port->dp; > - struct drm_dp_query_stream_enc_status_ack_reply reply; > - int ret; > - > - if (!intel_dp_hdcp_check_link(dig_port, connector)) > - return false; > - > - ret = drm_dp_send_query_stream_enc_status(&intel_dp->mst_mgr, > - connector->port, &reply); > - if (ret) { > - drm_dbg_kms(&i915->drm, > - "[CONNECTOR:%d:%s] failed QSES ret=%d\n", > - connector->base.base.id, connector->base.name, ret); > - return false; > - } > - > - return reply.auth_completed && reply.encryption_enabled; > -} > - > static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = { > .write_an_aksv = intel_dp_hdcp_write_an_aksv, > .read_bksv = intel_dp_hdcp_read_bksv, > @@ -674,7 +650,7 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = { > .read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo, > .read_v_prime_part = intel_dp_hdcp_read_v_prime_part, > .toggle_signalling = intel_dp_mst_hdcp_toggle_signalling, > - .check_link = intel_dp_mst_hdcp_check_link, > + .check_link = intel_dp_hdcp_check_link, > .hdcp_capable = intel_dp_hdcp_capable, > > .protocol = HDCP_PROTOCOL_DP, -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx