All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org,
	Michael Davidsaver <mdavidsaver@gmail.com>,
	Liviu Ionescu <ilg@livius.net>
Subject: Re: [Qemu-devel] [PATCH 9/9] armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE
Date: Wed, 15 Feb 2017 14:19:34 +0000	[thread overview]
Message-ID: <87d1ejv8nd.fsf@linaro.org> (raw)
In-Reply-To: <1486065742-28639-10-git-send-email-peter.maydell@linaro.org>


Peter Maydell <peter.maydell@linaro.org> writes:

> From: Michael Davidsaver <mdavidsaver@gmail.com>
>
> The VECTCLRACTIVE and VECTRESET bits in the AIRCR are both
> documented as UNPREDICTABLE if you write a 1 to them when
> the processor is not halted in Debug state (ie stopped
> and under the control of an external JTAG debugger).
> Since we don't implement Debug state or emulated JTAG
> these bits are always UNPREDICTABLE for us. Instead of
> logging them as unimplemented we can simply log writes
> as guest errors and ignore them.
>
> Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
> [PMM: change extracted from another patch; commit message
>  constructed from scratch]
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  hw/intc/armv7m_nvic.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
> index 7b61fe6..18c0e60 100644
> --- a/hw/intc/armv7m_nvic.c
> +++ b/hw/intc/armv7m_nvic.c
> @@ -698,10 +698,14 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value)
>                  qemu_irq_pulse(s->sysresetreq);
>              }
>              if (value & 2) {
> -                qemu_log_mask(LOG_UNIMP, "VECTCLRACTIVE unimplemented\n");
> +                qemu_log_mask(LOG_GUEST_ERROR,
> +                              "Setting VECTCLRACTIVE when not in DEBUG mode "
> +                              "is UNPREDICTABLE\n");
>              }
>              if (value & 1) {
> -                qemu_log_mask(LOG_UNIMP, "AIRCR system reset unimplemented\n");
> +                qemu_log_mask(LOG_GUEST_ERROR,
> +                              "Setting VECTRESET when not in DEBUG mode "
> +                              "is UNPREDICTABLE\n");
>              }
>              s->prigroup = extract32(value, 8, 3);
>              nvic_irq_update(s);


--
Alex Bennée

  parent reply	other threads:[~2017-02-15 14:19 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-02 20:02 [Qemu-devel] [PATCH 0/9] Rewrite NVIC to not depend on the GIC Peter Maydell
2017-02-02 20:02 ` [Qemu-devel] [PATCH 1/9] armv7m: Rename nvic_state to NVICState Peter Maydell
2017-02-10 14:23   ` Philippe Mathieu-Daudé
2017-02-14 17:00   ` Alex Bennée
2017-02-02 20:02 ` [Qemu-devel] [PATCH 2/9] armv7m: Implement reading and writing of PRIGROUP Peter Maydell
2017-02-10 14:27   ` Philippe Mathieu-Daudé
2017-02-14 17:08   ` Alex Bennée
2017-02-02 20:02 ` [Qemu-devel] [PATCH 3/9] armv7m: Rewrite NVIC to not use any GIC code Peter Maydell
2017-02-15 12:46   ` Alex Bennée
2017-02-15 13:34     ` Peter Maydell
2017-02-15 14:14       ` Alex Bennée
2017-02-15 14:27         ` Peter Maydell
2017-02-15 14:51           ` Alex Bennée
2017-02-16 14:11       ` Peter Maydell
2017-02-18 17:45         ` Michael Davidsaver
2017-02-18 18:38           ` Peter Maydell
2017-02-19 18:10             ` Michael Davidsaver
2017-02-16 16:12       ` Peter Maydell
2017-02-02 20:02 ` [Qemu-devel] [PATCH 4/9] armv7m: Fix condition check for taking exceptions Peter Maydell
2017-02-15 12:48   ` Alex Bennée
2017-02-02 20:02 ` [Qemu-devel] [PATCH 5/9] arm: gic: Remove references to NVIC Peter Maydell
2017-02-15 12:49   ` Alex Bennée
2017-04-17  3:11   ` Philippe Mathieu-Daudé
2017-02-02 20:02 ` [Qemu-devel] [PATCH 6/9] armv7m: Escalate exceptions to HardFault if necessary Peter Maydell
2017-02-15 14:15   ` Alex Bennée
2017-02-02 20:02 ` [Qemu-devel] [PATCH 7/9] armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value Peter Maydell
2017-02-15 14:16   ` Alex Bennée
2017-02-02 20:02 ` [Qemu-devel] [PATCH 8/9] armv7m: Simpler and faster exception start Peter Maydell
2017-02-15 14:18   ` Alex Bennée
2017-02-02 20:02 ` [Qemu-devel] [PATCH 9/9] armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE Peter Maydell
2017-02-10 14:31   ` Philippe Mathieu-Daudé
2017-02-15 14:19   ` Alex Bennée [this message]
2017-02-10 14:05 ` [Qemu-devel] [Qemu-arm] [PATCH 0/9] Rewrite NVIC to not depend on the GIC Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87d1ejv8nd.fsf@linaro.org \
    --to=alex.bennee@linaro.org \
    --cc=ilg@livius.net \
    --cc=mdavidsaver@gmail.com \
    --cc=patches@linaro.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.