From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45406) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aswlq-0005gZ-Ab for qemu-devel@nongnu.org; Wed, 20 Apr 2016 14:22:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aswlo-0000Rh-37 for qemu-devel@nongnu.org; Wed, 20 Apr 2016 14:22:38 -0400 Received: from mail-wm0-x22c.google.com ([2a00:1450:400c:c09::22c]:35380) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aswlm-0000RO-QG for qemu-devel@nongnu.org; Wed, 20 Apr 2016 14:22:36 -0400 Received: by mail-wm0-x22c.google.com with SMTP id e201so60449517wme.0 for ; Wed, 20 Apr 2016 11:22:34 -0700 (PDT) References: <1460044433-19282-1-git-send-email-sergey.fedorov@linaro.org> <1460044433-19282-9-git-send-email-sergey.fedorov@linaro.org> <87k2jsv0pv.fsf@linaro.org> <57179B80.9050800@twiddle.net> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <57179B80.9050800@twiddle.net> Date: Wed, 20 Apr 2016 19:22:32 +0100 Message-ID: <87ega0uolz.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 08/11] tcg/aarch64: Make direct jump patching thread-safe List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: Sergey Fedorov , qemu-devel@nongnu.org, Sergey Fedorov , Paolo Bonzini , Peter Crosthwaite , Claudio Fontana , qemu-arm@nongnu.org Richard Henderson writes: > On 04/20/2016 07:01 AM, Alex Bennée wrote: >> >> Sergey Fedorov writes: >> >>> From: Sergey Fedorov >>> >>> Ensure direct jump patching in AArch64 is atomic by using >>> atomic_read()/atomic_set() for code patching. >>> >>> Signed-off-by: Sergey Fedorov >>> Signed-off-by: Sergey Fedorov >>> --- >>> tcg/aarch64/tcg-target.inc.c | 14 +++++++++++++- >>> 1 file changed, 13 insertions(+), 1 deletion(-) >>> >>> diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c >>> index 0ed10a974121..15fdebec921f 100644 >>> --- a/tcg/aarch64/tcg-target.inc.c >>> +++ b/tcg/aarch64/tcg-target.inc.c >>> @@ -73,6 +73,18 @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target) >>> *code_ptr = deposit32(*code_ptr, 0, 26, offset); >>> } >>> >>> +static inline void reloc_pc26_atomic(tcg_insn_unit *code_ptr, >>> + tcg_insn_unit *target) >>> +{ >>> + ptrdiff_t offset = target - code_ptr; >>> + tcg_insn_unit insn; >>> + assert(offset == sextract64(offset, 0, 26)); >>> + /* read instruction, mask away previous PC_REL26 parameter contents, >>> + set the proper offset, then write back the instruction. */ >> >> This comment could be moved from here and reloc_pc26 and made common for >> the two following functions. > > There's a significant amount of cleanup that ought to happen here, now that > we're not re-translating TBs. I don't know if Sergey should be gated > on that. Is this stuff already in the works? Otherwise we are trying to get pre-cursors to MTTCG into the code (once the tree re-opens) to keep the main diff down. This also is beneficial for linux-user stuff. > > > r~ -- Alex Bennée