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From: Alex =?utf-8?Q?Benn=C3=A9e?= <alex.bennee@linaro.org>
In-reply-to: <20180305084111.GM2450@redhat.com>
Date: Mon, 05 Mar 2018 10:02:41 +0000
Message-ID: <87fu5eu9fi.fsf@linaro.org>
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Subject: Re: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission
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To: "Richard W.M. Jones" <rjones@redhat.com>
Cc: Michael Clark <mjc@sifive.com>, Bastian Koppelmann <kbastian@mail.uni-paderborn.de>, Palmer Dabbelt <palmer@sifive.com>, qemu-devel@nongnu.org, Sagar Karandikar <sagark@eecs.berkeley.edu>, RISC-V Patches <patches@groups.riscv.org>


Richard W.M. Jones <rjones@redhat.com> writes:

> The attached patch is also needed to avoid crashes during various
> math-heavy test suites.
>
> Rich.
>
> --
<snip>
> From: Stef O'Rear <sorear2@gmail.com>
> Date: Sat, 3 Mar 2018 03:46:00 -0800
> Subject: [PATCH] softfloat: fix crash on int conversion of SNaN
>
> Signed-off-by: Stef O'Rear <sorear2@gmail.com>
> ---
>  fpu/softfloat.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index e7fb0d357a..1da1db377e 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1342,6 +1342,8 @@ static int64_t round_to_int_and_pack(FloatParts in,=
 int rmode,
>      switch (p.cls) {
>      case float_class_snan:
>      case float_class_qnan:
> +    case float_class_dnan:
> +    case float_class_msnan:
>          return max;
>      case float_class_inf:
>          return p.sign ? min : max;
> @@ -1430,6 +1432,8 @@ static uint64_t round_to_uint_and_pack(FloatParts i=
n, int rmode, uint64_t max,
>      switch (p.cls) {
>      case float_class_snan:
>      case float_class_qnan:
> +    case float_class_dnan:
> +    case float_class_msnan:
>          s->float_exception_flags =3D orig_flags | float_flag_invalid;
>          return max;
>      case float_class_inf:

Obviously I wasn't exercising the NaN exit paths enough and we added the
return_nan() common code fairly late in the series.

Reviewed-by: Alex Benn=C3=A9e <alex.bennee@linaro.org>

--
Alex Benn=C3=A9e