From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59140) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bAZfm-0006pe-3W for qemu-devel@nongnu.org; Wed, 08 Jun 2016 05:21:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bAZfh-0002W3-SZ for qemu-devel@nongnu.org; Wed, 08 Jun 2016 05:21:13 -0400 Received: from mail-wm0-x229.google.com ([2a00:1450:400c:c09::229]:37837) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bAZfh-0002Vz-Lc for qemu-devel@nongnu.org; Wed, 08 Jun 2016 05:21:09 -0400 Received: by mail-wm0-x229.google.com with SMTP id k204so7674935wmk.0 for ; Wed, 08 Jun 2016 02:21:09 -0700 (PDT) From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <20160526163549.3276-2-a.rigo@virtualopensystems.com> Date: Wed, 08 Jun 2016 10:21:25 +0100 Message-ID: <87fusoghnu.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [RFC 01/10] exec: Introduce tcg_exclusive_{lock, unlock}() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alvise Rigo Cc: mttcg@listserver.greensocs.com, qemu-devel@nongnu.org, jani.kokkonen@huawei.com, claudio.fontana@huawei.com, tech@virtualopensystems.com, fred.konrad@greensocs.com, pbonzini@redhat.com, rth@twiddle.net, serge.fdrv@gmail.com, cota@braap.org, peter.maydell@linaro.org Alvise Rigo writes: > Add tcg_exclusive_{lock,unlock}() functions that will be used for making > the emulation of LL and SC instructions thread safe. I wonder how much similarity there is to the mechanism linus-user ends up using for it's exclusive-start/end? > > Signed-off-by: Alvise Rigo > --- > cpus.c | 2 ++ > exec.c | 18 ++++++++++++++++++ > include/qom/cpu.h | 5 +++++ > 3 files changed, 25 insertions(+) > > diff --git a/cpus.c b/cpus.c > index 860e7ba..b9ec903 100644 > --- a/cpus.c > +++ b/cpus.c > @@ -961,6 +961,8 @@ void qemu_init_cpu_loop(void) > qemu_cond_init(&qemu_work_cond); > qemu_mutex_init(&qemu_global_mutex); > > + qemu_spin_init(&cpu_exclusive_lock); > + > qemu_thread_get_self(&io_thread); > > safe_work = g_array_sized_new(TRUE, TRUE, sizeof(qemu_safe_work_item), 128); > diff --git a/exec.c b/exec.c > index a24b31c..1c72113 100644 > --- a/exec.c > +++ b/exec.c > @@ -197,6 +197,24 @@ void cpu_exclusive_history_free(void) > g_free(excl_history.c_array); > } > } > + > +__thread bool cpu_have_exclusive_lock; > +QemuSpin cpu_exclusive_lock; > +inline void tcg_exclusive_lock(void) > +{ > + if (!cpu_have_exclusive_lock) { > + qemu_spin_lock(&cpu_exclusive_lock); > + cpu_have_exclusive_lock = true; > + } > +} > + > +inline void tcg_exclusive_unlock(void) > +{ > + if (cpu_have_exclusive_lock) { > + cpu_have_exclusive_lock = false; > + qemu_spin_unlock(&cpu_exclusive_lock); > + } > +} > #endif > > #if !defined(CONFIG_USER_ONLY) > diff --git a/include/qom/cpu.h b/include/qom/cpu.h > index 0f51870..019f06d 100644 > --- a/include/qom/cpu.h > +++ b/include/qom/cpu.h > @@ -201,6 +201,11 @@ typedef struct CPUClass { > void (*disas_set_info)(CPUState *cpu, disassemble_info *info); > } CPUClass; > > +/* Protect cpu_exclusive_* variable .*/ > +void tcg_exclusive_lock(void); > +void tcg_exclusive_unlock(void); > +extern QemuSpin cpu_exclusive_lock; > + > #ifdef HOST_WORDS_BIGENDIAN > typedef struct icount_decr_u16 { > uint16_t high; -- Alex Bennée