From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753387AbbDBOGj (ORCPT ); Thu, 2 Apr 2015 10:06:39 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:34664 "EHLO socrates.bennee.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753055AbbDBOGa (ORCPT ); Thu, 2 Apr 2015 10:06:30 -0400 References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> <1427814488-28467-7-git-send-email-alex.bennee@linaro.org> <20150402145203.01c3654b@thinkpad-w530> From: Alex =?utf-8?Q?Benn=C3=A9e?= To: David Hildenbrand Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, peter.maydell@linaro.org, agraf@suse.de, drjones@redhat.com, pbonzini@redhat.com, zhichao.huang@linaro.org, jan.kiszka@siemens.com, r65777@freescale.com, bp@suse.de, Gleb Natapov , Jonathan Corbet , Russell King , Catalin Marinas , Will Deacon , "open list\:DOCUMENTATION" , open list Subject: Re: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support In-reply-to: <20150402145203.01c3654b@thinkpad-w530> Date: Thu, 02 Apr 2015 15:06:09 +0100 Message-ID: <87fv8iy69a.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org David Hildenbrand writes: >> This adds support for SW breakpoints inserted by userspace. >> >> We do this by trapping all BKPT exceptions in the >> hypervisor (MDCR_EL2_TDE). The kvm_debug_exit_arch carries the address >> of the exception. If user-space doesn't know of the breakpoint then we >> have a guest inserted breakpoint and the hypervisor needs to start again >> and deliver the exception to guest. >> >> Signed-off-by: Alex Bennée >> >> --- >> v2 >> - update to use new exit struct >> - tweak for C setup >> - do our setup in debug_setup/clear code >> - fixed up comments >> >> diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt >> index 06c5064..17d4f9c 100644 >> --- a/Documentation/virtual/kvm/api.txt >> +++ b/Documentation/virtual/kvm/api.txt >> @@ -2626,7 +2626,7 @@ when running. Common control bits are: >> The top 16 bits of the control field are architecture specific control >> flags which can include the following: >> >> - - KVM_GUESTDBG_USE_SW_BP: using software breakpoints [x86] >> + - KVM_GUESTDBG_USE_SW_BP: using software breakpoints [x86, arm64] >> - KVM_GUESTDBG_USE_HW_BP: using hardware breakpoints [x86, s390] >> - KVM_GUESTDBG_INJECT_DB: inject DB type exception [x86] >> - KVM_GUESTDBG_INJECT_BP: inject BP type exception [x86] >> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c >> index 7ea8b0e..d3bc8dc 100644 >> --- a/arch/arm/kvm/arm.c >> +++ b/arch/arm/kvm/arm.c >> @@ -304,7 +304,7 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) >> kvm_arm_set_running_vcpu(NULL); >> } >> >> -#define KVM_GUESTDBG_VALID (KVM_GUESTDBG_ENABLE) >> +#define KVM_GUESTDBG_VALID (KVM_GUESTDBG_ENABLE|KVM_GUESTDBG_USE_SW_BP) >> >> int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, >> struct kvm_guest_debug *dbg) >> diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c >> index 8a29d0b..cff0475 100644 >> --- a/arch/arm64/kvm/debug.c >> +++ b/arch/arm64/kvm/debug.c >> @@ -45,11 +45,18 @@ void kvm_arch_setup_debug(struct kvm_vcpu *vcpu) >> vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM | MDCR_EL2_TPMCR); >> vcpu->arch.mdcr_el2 |= (MDCR_EL2_TDRA | MDCR_EL2_TDOSA); >> >> + /* Trap debug register access? */ > > This should probably go to the earlier patch. Agreed. > >> if (!vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY) >> vcpu->arch.mdcr_el2 |= MDCR_EL2_TDA; >> else >> vcpu->arch.mdcr_el2 &= ~MDCR_EL2_TDA; >> >> + /* Trap breakpoints? */ >> + if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) >> + vcpu->arch.mdcr_el2 |= MDCR_EL2_TDE; >> + else >> + vcpu->arch.mdcr_el2 &= ~MDCR_EL2_TDE; > > Again, a candidate for clear_debug? I don't follow. Changes to mdcr_el2 will only get applied as we jump in through the hyp.S code. We need to ensure the guest can use SW BKPTs if we are not. > >> + >> } >> >> void kvm_arch_clear_debug(struct kvm_vcpu *vcpu) >> diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c >> index 524fa25..ed1bbb4 100644 >> --- a/arch/arm64/kvm/handle_exit.c >> +++ b/arch/arm64/kvm/handle_exit.c >> @@ -82,6 +82,37 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run) >> return 1; >> } >> >> +/** >> + * kvm_handle_debug_exception - handle a debug exception instruction > > "kvm_handle_guest_debug" Sure. > >> + * >> + * @vcpu: the vcpu pointer >> + * @run: access to the kvm_run structure for results >> + * >> + * We route all debug exceptions through the same handler as we >> + * just need to report the PC and the HSR values to userspace. >> + * Userspace may decide to re-inject the exception and deliver it to >> + * the guest if it wasn't for the host to deal with. >> + */ >> +static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run) >> +{ >> + u32 hsr = kvm_vcpu_get_hsr(vcpu); >> + >> + run->exit_reason = KVM_EXIT_DEBUG; >> + run->debug.arch.hsr = hsr; >> + >> + switch (hsr >> ESR_ELx_EC_SHIFT) { >> + case ESR_ELx_EC_BKPT32: >> + case ESR_ELx_EC_BRK64: >> + run->debug.arch.pc = *vcpu_pc(vcpu); >> + break; >> + default: >> + kvm_err("%s: un-handled case hsr: %#08x\n", >> + __func__, (unsigned int) hsr); > > Don't you want to fail hard in this case? This might result in many messages. > returning 0 feels wrong. You mean a BUG_ON()? Although it would be a cock up on the hosts part to have an un-handled exception enabled allowing the guest to trigger a host panic seems excessive. > >> + break; >> + } >> + return 0; >> +} >> + >> static exit_handle_fn arm_exit_handlers[] = { >> [ESR_ELx_EC_WFx] = kvm_handle_wfx, >> [ESR_ELx_EC_CP15_32] = kvm_handle_cp15_32, >> @@ -96,6 +127,8 @@ static exit_handle_fn arm_exit_handlers[] = { >> [ESR_ELx_EC_SYS64] = kvm_handle_sys_reg, >> [ESR_ELx_EC_IABT_LOW] = kvm_handle_guest_abort, >> [ESR_ELx_EC_DABT_LOW] = kvm_handle_guest_abort, >> + [ESR_ELx_EC_BKPT32] = kvm_handle_guest_debug, >> + [ESR_ELx_EC_BRK64] = kvm_handle_guest_debug, >> }; >> >> static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu) > > > David -- Alex Bennée From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex =?utf-8?Q?Benn=C3=A9e?= Subject: Re: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support Date: Thu, 02 Apr 2015 15:06:09 +0100 Message-ID: <87fv8iy69a.fsf@linaro.org> References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> <1427814488-28467-7-git-send-email-alex.bennee@linaro.org> <20150402145203.01c3654b@thinkpad-w530> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Cc: Russell King , kvm@vger.kernel.org, Jonathan Corbet , marc.zyngier@arm.com, jan.kiszka@siemens.com, "open list:DOCUMENTATION" , Will Deacon , open list , Gleb Natapov , linux-arm-kernel@lists.infradead.org, zhichao.huang@linaro.org, r65777@freescale.com, pbonzini@redhat.com, bp@suse.de, Catalin Marinas , kvmarm@lists.cs.columbia.edu To: David Hildenbrand Return-path: In-reply-to: <20150402145203.01c3654b@thinkpad-w530> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu List-Id: kvm.vger.kernel.org CkRhdmlkIEhpbGRlbmJyYW5kIDxkYWhpQGxpbnV4LnZuZXQuaWJtLmNvbT4gd3JpdGVzOgoKPj4g VGhpcyBhZGRzIHN1cHBvcnQgZm9yIFNXIGJyZWFrcG9pbnRzIGluc2VydGVkIGJ5IHVzZXJzcGFj ZS4KPj4gCj4+IFdlIGRvIHRoaXMgYnkgdHJhcHBpbmcgYWxsIEJLUFQgZXhjZXB0aW9ucyBpbiB0 aGUKPj4gaHlwZXJ2aXNvciAoTURDUl9FTDJfVERFKS4gVGhlIGt2bV9kZWJ1Z19leGl0X2FyY2gg Y2FycmllcyB0aGUgYWRkcmVzcwo+PiBvZiB0aGUgZXhjZXB0aW9uLiBJZiB1c2VyLXNwYWNlIGRv ZXNuJ3Qga25vdyBvZiB0aGUgYnJlYWtwb2ludCB0aGVuIHdlCj4+IGhhdmUgYSBndWVzdCBpbnNl cnRlZCBicmVha3BvaW50IGFuZCB0aGUgaHlwZXJ2aXNvciBuZWVkcyB0byBzdGFydCBhZ2Fpbgo+ PiBhbmQgZGVsaXZlciB0aGUgZXhjZXB0aW9uIHRvIGd1ZXN0Lgo+PiAKPj4gU2lnbmVkLW9mZi1i eTogQWxleCBCZW5uw6llIDxhbGV4LmJlbm5lZUBsaW5hcm8ub3JnPgo+PiAKPj4gLS0tCj4+IHYy Cj4+ICAgLSB1cGRhdGUgdG8gdXNlIG5ldyBleGl0IHN0cnVjdAo+PiAgIC0gdHdlYWsgZm9yIEMg c2V0dXAKPj4gICAtIGRvIG91ciBzZXR1cCBpbiBkZWJ1Z19zZXR1cC9jbGVhciBjb2RlCj4+ICAg LSBmaXhlZCB1cCBjb21tZW50cwo+PiAKPj4gZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24vdmly dHVhbC9rdm0vYXBpLnR4dCBiL0RvY3VtZW50YXRpb24vdmlydHVhbC9rdm0vYXBpLnR4dAo+PiBp bmRleCAwNmM1MDY0Li4xN2Q0ZjljIDEwMDY0NAo+PiAtLS0gYS9Eb2N1bWVudGF0aW9uL3ZpcnR1 YWwva3ZtL2FwaS50eHQKPj4gKysrIGIvRG9jdW1lbnRhdGlvbi92aXJ0dWFsL2t2bS9hcGkudHh0 Cj4+IEBAIC0yNjI2LDcgKzI2MjYsNyBAQCB3aGVuIHJ1bm5pbmcuIENvbW1vbiBjb250cm9sIGJp dHMgYXJlOgo+PiAgVGhlIHRvcCAxNiBiaXRzIG9mIHRoZSBjb250cm9sIGZpZWxkIGFyZSBhcmNo aXRlY3R1cmUgc3BlY2lmaWMgY29udHJvbAo+PiAgZmxhZ3Mgd2hpY2ggY2FuIGluY2x1ZGUgdGhl IGZvbGxvd2luZzoKPj4gCj4+IC0gIC0gS1ZNX0dVRVNUREJHX1VTRV9TV19CUDogICAgIHVzaW5n IHNvZnR3YXJlIGJyZWFrcG9pbnRzIFt4ODZdCj4+ICsgIC0gS1ZNX0dVRVNUREJHX1VTRV9TV19C UDogICAgIHVzaW5nIHNvZnR3YXJlIGJyZWFrcG9pbnRzIFt4ODYsIGFybTY0XQo+PiAgICAtIEtW TV9HVUVTVERCR19VU0VfSFdfQlA6ICAgICB1c2luZyBoYXJkd2FyZSBicmVha3BvaW50cyBbeDg2 LCBzMzkwXQo+PiAgICAtIEtWTV9HVUVTVERCR19JTkpFQ1RfREI6ICAgICBpbmplY3QgREIgdHlw ZSBleGNlcHRpb24gW3g4Nl0KPj4gICAgLSBLVk1fR1VFU1REQkdfSU5KRUNUX0JQOiAgICAgaW5q ZWN0IEJQIHR5cGUgZXhjZXB0aW9uIFt4ODZdCj4+IGRpZmYgLS1naXQgYS9hcmNoL2FybS9rdm0v YXJtLmMgYi9hcmNoL2FybS9rdm0vYXJtLmMKPj4gaW5kZXggN2VhOGIwZS4uZDNiYzhkYyAxMDA2 NDQKPj4gLS0tIGEvYXJjaC9hcm0va3ZtL2FybS5jCj4+ICsrKyBiL2FyY2gvYXJtL2t2bS9hcm0u Ywo+PiBAQCAtMzA0LDcgKzMwNCw3IEBAIHZvaWQga3ZtX2FyY2hfdmNwdV9wdXQoc3RydWN0IGt2 bV92Y3B1ICp2Y3B1KQo+PiAgCWt2bV9hcm1fc2V0X3J1bm5pbmdfdmNwdShOVUxMKTsKPj4gIH0K Pj4gCj4+IC0jZGVmaW5lIEtWTV9HVUVTVERCR19WQUxJRCAoS1ZNX0dVRVNUREJHX0VOQUJMRSkK Pj4gKyNkZWZpbmUgS1ZNX0dVRVNUREJHX1ZBTElEIChLVk1fR1VFU1REQkdfRU5BQkxFfEtWTV9H VUVTVERCR19VU0VfU1dfQlApCj4+IAo+PiAgaW50IGt2bV9hcmNoX3ZjcHVfaW9jdGxfc2V0X2d1 ZXN0X2RlYnVnKHN0cnVjdCBrdm1fdmNwdSAqdmNwdSwKPj4gIAkJCQkJc3RydWN0IGt2bV9ndWVz dF9kZWJ1ZyAqZGJnKQo+PiBkaWZmIC0tZ2l0IGEvYXJjaC9hcm02NC9rdm0vZGVidWcuYyBiL2Fy Y2gvYXJtNjQva3ZtL2RlYnVnLmMKPj4gaW5kZXggOGEyOWQwYi4uY2ZmMDQ3NSAxMDA2NDQKPj4g LS0tIGEvYXJjaC9hcm02NC9rdm0vZGVidWcuYwo+PiArKysgYi9hcmNoL2FybTY0L2t2bS9kZWJ1 Zy5jCj4+IEBAIC00NSwxMSArNDUsMTggQEAgdm9pZCBrdm1fYXJjaF9zZXR1cF9kZWJ1ZyhzdHJ1 Y3Qga3ZtX3ZjcHUgKnZjcHUpCj4+ICAJdmNwdS0+YXJjaC5tZGNyX2VsMiB8PSAoTURDUl9FTDJf VFBNIHwgTURDUl9FTDJfVFBNQ1IpOwo+PiAgCXZjcHUtPmFyY2gubWRjcl9lbDIgfD0gKE1EQ1Jf RUwyX1REUkEgfCBNRENSX0VMMl9URE9TQSk7Cj4+IAo+PiArCS8qIFRyYXAgZGVidWcgcmVnaXN0 ZXIgYWNjZXNzPyAqLwo+Cj4gVGhpcyBzaG91bGQgcHJvYmFibHkgZ28gdG8gdGhlIGVhcmxpZXIg cGF0Y2guCgpBZ3JlZWQuCgo+Cj4+ICAJaWYgKCF2Y3B1LT5hcmNoLmRlYnVnX2ZsYWdzICYgS1ZN X0FSTTY0X0RFQlVHX0RJUlRZKQo+PiAgCQl2Y3B1LT5hcmNoLm1kY3JfZWwyIHw9IE1EQ1JfRUwy X1REQTsKPj4gIAllbHNlCj4+ICAJCXZjcHUtPmFyY2gubWRjcl9lbDIgJj0gfk1EQ1JfRUwyX1RE QTsKPj4gCj4+ICsJLyogVHJhcCBicmVha3BvaW50cz8gKi8KPj4gKwlpZiAodmNwdS0+Z3Vlc3Rf ZGVidWcgJiBLVk1fR1VFU1REQkdfVVNFX1NXX0JQKQo+PiArCQl2Y3B1LT5hcmNoLm1kY3JfZWwy IHw9IE1EQ1JfRUwyX1RERTsKPj4gKwllbHNlCj4+ICsJCXZjcHUtPmFyY2gubWRjcl9lbDIgJj0g fk1EQ1JfRUwyX1RERTsKPgo+IEFnYWluLCBhIGNhbmRpZGF0ZSBmb3IgY2xlYXJfZGVidWc/CgpJ IGRvbid0IGZvbGxvdy4gQ2hhbmdlcyB0byBtZGNyX2VsMiB3aWxsIG9ubHkgZ2V0IGFwcGxpZWQg YXMgd2UganVtcCBpbgp0aHJvdWdoIHRoZSBoeXAuUyBjb2RlLiBXZSBuZWVkIHRvIGVuc3VyZSB0 aGUgZ3Vlc3QgY2FuIHVzZSBTVyBCS1BUcyBpZgp3ZSBhcmUgbm90LgoKPgo+PiArCj4+ICB9Cj4+ IAo+PiAgdm9pZCBrdm1fYXJjaF9jbGVhcl9kZWJ1ZyhzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUpCj4+ IGRpZmYgLS1naXQgYS9hcmNoL2FybTY0L2t2bS9oYW5kbGVfZXhpdC5jIGIvYXJjaC9hcm02NC9r dm0vaGFuZGxlX2V4aXQuYwo+PiBpbmRleCA1MjRmYTI1Li5lZDFiYmI0IDEwMDY0NAo+PiAtLS0g YS9hcmNoL2FybTY0L2t2bS9oYW5kbGVfZXhpdC5jCj4+ICsrKyBiL2FyY2gvYXJtNjQva3ZtL2hh bmRsZV9leGl0LmMKPj4gQEAgLTgyLDYgKzgyLDM3IEBAIHN0YXRpYyBpbnQga3ZtX2hhbmRsZV93 Zngoc3RydWN0IGt2bV92Y3B1ICp2Y3B1LCBzdHJ1Y3Qga3ZtX3J1biAqcnVuKQo+PiAgCXJldHVy biAxOwo+PiAgfQo+PiAKPj4gKy8qKgo+PiArICoga3ZtX2hhbmRsZV9kZWJ1Z19leGNlcHRpb24g LSBoYW5kbGUgYSBkZWJ1ZyBleGNlcHRpb24gaW5zdHJ1Y3Rpb24KPgo+ICJrdm1faGFuZGxlX2d1 ZXN0X2RlYnVnIgoKU3VyZS4KCj4KPj4gKyAqCj4+ICsgKiBAdmNwdToJdGhlIHZjcHUgcG9pbnRl cgo+PiArICogQHJ1bjoJYWNjZXNzIHRvIHRoZSBrdm1fcnVuIHN0cnVjdHVyZSBmb3IgcmVzdWx0 cwo+PiArICoKPj4gKyAqIFdlIHJvdXRlIGFsbCBkZWJ1ZyBleGNlcHRpb25zIHRocm91Z2ggdGhl IHNhbWUgaGFuZGxlciBhcyB3ZQo+PiArICoganVzdCBuZWVkIHRvIHJlcG9ydCB0aGUgUEMgYW5k IHRoZSBIU1IgdmFsdWVzIHRvIHVzZXJzcGFjZS4KPj4gKyAqIFVzZXJzcGFjZSBtYXkgZGVjaWRl IHRvIHJlLWluamVjdCB0aGUgZXhjZXB0aW9uIGFuZCBkZWxpdmVyIGl0IHRvCj4+ICsgKiB0aGUg Z3Vlc3QgaWYgaXQgd2Fzbid0IGZvciB0aGUgaG9zdCB0byBkZWFsIHdpdGguCj4+ICsgKi8KPj4g K3N0YXRpYyBpbnQga3ZtX2hhbmRsZV9ndWVzdF9kZWJ1ZyhzdHJ1Y3Qga3ZtX3ZjcHUgKnZjcHUs IHN0cnVjdCBrdm1fcnVuICpydW4pCj4+ICt7Cj4+ICsJdTMyIGhzciA9IGt2bV92Y3B1X2dldF9o c3IodmNwdSk7Cj4+ICsKPj4gKwlydW4tPmV4aXRfcmVhc29uID0gS1ZNX0VYSVRfREVCVUc7Cj4+ ICsJcnVuLT5kZWJ1Zy5hcmNoLmhzciA9IGhzcjsKPj4gKwo+PiArCXN3aXRjaCAoaHNyID4+IEVT Ul9FTHhfRUNfU0hJRlQpIHsKPj4gKwljYXNlIEVTUl9FTHhfRUNfQktQVDMyOgo+PiArCWNhc2Ug RVNSX0VMeF9FQ19CUks2NDoKPj4gKwkJcnVuLT5kZWJ1Zy5hcmNoLnBjID0gKnZjcHVfcGModmNw dSk7Cj4+ICsJCWJyZWFrOwo+PiArCWRlZmF1bHQ6Cj4+ICsJCWt2bV9lcnIoIiVzOiB1bi1oYW5k bGVkIGNhc2UgaHNyOiAlIzA4eFxuIiwKPj4gKwkJCV9fZnVuY19fLCAodW5zaWduZWQgaW50KSBo c3IpOwo+Cj4gRG9uJ3QgeW91IHdhbnQgdG8gZmFpbCBoYXJkIGluIHRoaXMgY2FzZT8gVGhpcyBt aWdodCByZXN1bHQgaW4gbWFueSBtZXNzYWdlcy4KPiByZXR1cm5pbmcgMCBmZWVscyB3cm9uZy4K CllvdSBtZWFuIGEgQlVHX09OKCk/IEFsdGhvdWdoIGl0IHdvdWxkIGJlIGEgY29jayB1cCBvbiB0 aGUgaG9zdHMgcGFydCB0bwpoYXZlIGFuIHVuLWhhbmRsZWQgZXhjZXB0aW9uIGVuYWJsZWQgYWxs b3dpbmcgdGhlIGd1ZXN0IHRvIHRyaWdnZXIgYQpob3N0IHBhbmljIHNlZW1zIGV4Y2Vzc2l2ZS4K Cj4KPj4gKwkJYnJlYWs7Cj4+ICsJfQo+PiArCXJldHVybiAwOwo+PiArfQo+PiArCj4+ICBzdGF0 aWMgZXhpdF9oYW5kbGVfZm4gYXJtX2V4aXRfaGFuZGxlcnNbXSA9IHsKPj4gIAlbRVNSX0VMeF9F Q19XRnhdCT0ga3ZtX2hhbmRsZV93ZngsCj4+ICAJW0VTUl9FTHhfRUNfQ1AxNV8zMl0JPSBrdm1f aGFuZGxlX2NwMTVfMzIsCj4+IEBAIC05Niw2ICsxMjcsOCBAQCBzdGF0aWMgZXhpdF9oYW5kbGVf Zm4gYXJtX2V4aXRfaGFuZGxlcnNbXSA9IHsKPj4gIAlbRVNSX0VMeF9FQ19TWVM2NF0JPSBrdm1f aGFuZGxlX3N5c19yZWcsCj4+ICAJW0VTUl9FTHhfRUNfSUFCVF9MT1ddCT0ga3ZtX2hhbmRsZV9n dWVzdF9hYm9ydCwKPj4gIAlbRVNSX0VMeF9FQ19EQUJUX0xPV10JPSBrdm1faGFuZGxlX2d1ZXN0 X2Fib3J0LAo+PiArCVtFU1JfRUx4X0VDX0JLUFQzMl0JPSBrdm1faGFuZGxlX2d1ZXN0X2RlYnVn LAo+PiArCVtFU1JfRUx4X0VDX0JSSzY0XQk9IGt2bV9oYW5kbGVfZ3Vlc3RfZGVidWcsCj4+ICB9 Owo+PiAKPj4gIHN0YXRpYyBleGl0X2hhbmRsZV9mbiBrdm1fZ2V0X2V4aXRfaGFuZGxlcihzdHJ1 Y3Qga3ZtX3ZjcHUgKnZjcHUpCj4KPgo+IERhdmlkCgotLSAKQWxleCBCZW5uw6llCl9fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmt2bWFybSBtYWlsaW5nIGxp c3QKa3ZtYXJtQGxpc3RzLmNzLmNvbHVtYmlhLmVkdQpodHRwczovL2xpc3RzLmNzLmNvbHVtYmlh LmVkdS9tYWlsbWFuL2xpc3RpbmZvL2t2bWFybQo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: alex.bennee@linaro.org (Alex =?utf-8?Q?Benn=C3=A9e?=) Date: Thu, 02 Apr 2015 15:06:09 +0100 Subject: [PATCH v2 06/10] KVM: arm64: guest debug, add SW break point support In-Reply-To: <20150402145203.01c3654b@thinkpad-w530> References: <1427814488-28467-1-git-send-email-alex.bennee@linaro.org> <1427814488-28467-7-git-send-email-alex.bennee@linaro.org> <20150402145203.01c3654b@thinkpad-w530> Message-ID: <87fv8iy69a.fsf@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org David Hildenbrand writes: >> This adds support for SW breakpoints inserted by userspace. >> >> We do this by trapping all BKPT exceptions in the >> hypervisor (MDCR_EL2_TDE). The kvm_debug_exit_arch carries the address >> of the exception. If user-space doesn't know of the breakpoint then we >> have a guest inserted breakpoint and the hypervisor needs to start again >> and deliver the exception to guest. >> >> Signed-off-by: Alex Benn?e >> >> --- >> v2 >> - update to use new exit struct >> - tweak for C setup >> - do our setup in debug_setup/clear code >> - fixed up comments >> >> diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt >> index 06c5064..17d4f9c 100644 >> --- a/Documentation/virtual/kvm/api.txt >> +++ b/Documentation/virtual/kvm/api.txt >> @@ -2626,7 +2626,7 @@ when running. Common control bits are: >> The top 16 bits of the control field are architecture specific control >> flags which can include the following: >> >> - - KVM_GUESTDBG_USE_SW_BP: using software breakpoints [x86] >> + - KVM_GUESTDBG_USE_SW_BP: using software breakpoints [x86, arm64] >> - KVM_GUESTDBG_USE_HW_BP: using hardware breakpoints [x86, s390] >> - KVM_GUESTDBG_INJECT_DB: inject DB type exception [x86] >> - KVM_GUESTDBG_INJECT_BP: inject BP type exception [x86] >> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c >> index 7ea8b0e..d3bc8dc 100644 >> --- a/arch/arm/kvm/arm.c >> +++ b/arch/arm/kvm/arm.c >> @@ -304,7 +304,7 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) >> kvm_arm_set_running_vcpu(NULL); >> } >> >> -#define KVM_GUESTDBG_VALID (KVM_GUESTDBG_ENABLE) >> +#define KVM_GUESTDBG_VALID (KVM_GUESTDBG_ENABLE|KVM_GUESTDBG_USE_SW_BP) >> >> int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, >> struct kvm_guest_debug *dbg) >> diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c >> index 8a29d0b..cff0475 100644 >> --- a/arch/arm64/kvm/debug.c >> +++ b/arch/arm64/kvm/debug.c >> @@ -45,11 +45,18 @@ void kvm_arch_setup_debug(struct kvm_vcpu *vcpu) >> vcpu->arch.mdcr_el2 |= (MDCR_EL2_TPM | MDCR_EL2_TPMCR); >> vcpu->arch.mdcr_el2 |= (MDCR_EL2_TDRA | MDCR_EL2_TDOSA); >> >> + /* Trap debug register access? */ > > This should probably go to the earlier patch. Agreed. > >> if (!vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY) >> vcpu->arch.mdcr_el2 |= MDCR_EL2_TDA; >> else >> vcpu->arch.mdcr_el2 &= ~MDCR_EL2_TDA; >> >> + /* Trap breakpoints? */ >> + if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) >> + vcpu->arch.mdcr_el2 |= MDCR_EL2_TDE; >> + else >> + vcpu->arch.mdcr_el2 &= ~MDCR_EL2_TDE; > > Again, a candidate for clear_debug? I don't follow. Changes to mdcr_el2 will only get applied as we jump in through the hyp.S code. We need to ensure the guest can use SW BKPTs if we are not. > >> + >> } >> >> void kvm_arch_clear_debug(struct kvm_vcpu *vcpu) >> diff --git a/arch/arm64/kvm/handle_exit.c b/arch/arm64/kvm/handle_exit.c >> index 524fa25..ed1bbb4 100644 >> --- a/arch/arm64/kvm/handle_exit.c >> +++ b/arch/arm64/kvm/handle_exit.c >> @@ -82,6 +82,37 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run) >> return 1; >> } >> >> +/** >> + * kvm_handle_debug_exception - handle a debug exception instruction > > "kvm_handle_guest_debug" Sure. > >> + * >> + * @vcpu: the vcpu pointer >> + * @run: access to the kvm_run structure for results >> + * >> + * We route all debug exceptions through the same handler as we >> + * just need to report the PC and the HSR values to userspace. >> + * Userspace may decide to re-inject the exception and deliver it to >> + * the guest if it wasn't for the host to deal with. >> + */ >> +static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run) >> +{ >> + u32 hsr = kvm_vcpu_get_hsr(vcpu); >> + >> + run->exit_reason = KVM_EXIT_DEBUG; >> + run->debug.arch.hsr = hsr; >> + >> + switch (hsr >> ESR_ELx_EC_SHIFT) { >> + case ESR_ELx_EC_BKPT32: >> + case ESR_ELx_EC_BRK64: >> + run->debug.arch.pc = *vcpu_pc(vcpu); >> + break; >> + default: >> + kvm_err("%s: un-handled case hsr: %#08x\n", >> + __func__, (unsigned int) hsr); > > Don't you want to fail hard in this case? This might result in many messages. > returning 0 feels wrong. You mean a BUG_ON()? Although it would be a cock up on the hosts part to have an un-handled exception enabled allowing the guest to trigger a host panic seems excessive. > >> + break; >> + } >> + return 0; >> +} >> + >> static exit_handle_fn arm_exit_handlers[] = { >> [ESR_ELx_EC_WFx] = kvm_handle_wfx, >> [ESR_ELx_EC_CP15_32] = kvm_handle_cp15_32, >> @@ -96,6 +127,8 @@ static exit_handle_fn arm_exit_handlers[] = { >> [ESR_ELx_EC_SYS64] = kvm_handle_sys_reg, >> [ESR_ELx_EC_IABT_LOW] = kvm_handle_guest_abort, >> [ESR_ELx_EC_DABT_LOW] = kvm_handle_guest_abort, >> + [ESR_ELx_EC_BKPT32] = kvm_handle_guest_debug, >> + [ESR_ELx_EC_BRK64] = kvm_handle_guest_debug, >> }; >> >> static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu) > > > David -- Alex Benn?e